公开(公告)号：US20230371255A1

公开(公告)日：2023-11-16

申请号：US18152211

申请日：2023-01-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： MOO RYM CHOI ,  Jung Tae Sung ,  Yun Sun Jang

IPC: H10B43/27 ,  H10B80/00

CPC classification number: H10B43/27 ,  H10B80/00

Abstract: Provided are a memory device, a method of fabricating the same, and an electronic system including the same. The memory device includes a peripheral circuit structure and a cell structure on the peripheral circuit structure. The cell structure comprises a cell substrate including a first surface facing the peripheral circuit structure and a second surface opposite to the first surface and having a first conductivity type, gate electrodes on the first surface of the cell substrate, a channel structure intersecting the gate electrodes and connected to the cell substrate, a first impurity region that is in the cell substrate adjacent to the second surface and has a second conductivity type, and a second impurity region that is in the cell substrate and is spaced apart from the first impurity region, the second impurity region having the first conductivity type with a higher impurity concentration than that of the cell substrate.