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公开(公告)号:US12117903B2
公开(公告)日:2024-10-15
申请号:US18223019
申请日:2023-07-17
Applicant: Samsung Electronics Co., Ltd.
Inventor: Mian Qin , Joo Hwan Lee , Rekha Pitchumani , Yang Seok Ki
CPC classification number: G06F11/1076 , G06F13/28
Abstract: According to one general aspect, an apparatus may include a host interface circuit configured to receive offloading instructions from a host processing device, wherein the offloading instructions instruct the apparatus to compute an error correction code associated with a plurality of data elements. The apparatus may include a memory interface circuit configured to receive the plurality of data elements. The apparatus may include a plurality of memory buffer circuits configured to temporarily store the plurality of data elements. The apparatus may include a plurality of error code computation circuits configured to, at least in part, compute the error correction code without additional processing by the host processing device.
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公开(公告)号:US10929227B2
公开(公告)日:2021-02-23
申请号:US16271777
申请日:2019-02-08
Applicant: Samsung Electronics Co., Ltd.
Inventor: Mian Qin , Joo Hwan Lee , Rekha Pitchumani , Yang Seok Ki
Abstract: According to one general aspect, an apparatus may include a host interface circuit configured to receive offloading instructions from a host processing device, wherein the offloading instructions instruct the apparatus to compute an error correction code associated with a plurality of data elements. The apparatus may include a memory interface circuit configured to receive the plurality of data elements. The apparatus may include a plurality of memory buffer circuits configured to temporarily store the plurality of data elements. The apparatus may include a plurality of error code computation circuits configured to, at least in part, compute the error correction code without additional processing by the host processing device.
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公开(公告)号:US11726876B2
公开(公告)日:2023-08-15
申请号:US17367315
申请日:2021-07-02
Applicant: Samsung Electronics Co., Ltd.
Inventor: Mian Qin , Joo Hwan Lee , Rekha Pitchumani , Yang Seok Ki
CPC classification number: G06F11/1076 , G06F13/28
Abstract: According to one general aspect, an apparatus may include a host interface circuit configured to receive offloading instructions from a host processing device, wherein the offloading instructions instruct the apparatus to compute an error correction code associated with a plurality of data elements. The apparatus may include a memory interface circuit configured to receive the plurality of data elements. The apparatus may include a plurality of memory buffer circuits configured to temporarily store the plurality of data elements. The apparatus may include a plurality of error code computation circuits configured to, at least in part, compute the error correction code without additional processing by the host processing device.
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公开(公告)号:US11061772B2
公开(公告)日:2021-07-13
申请号:US16271777
申请日:2019-02-08
Applicant: Samsung Electronics Co., Ltd.
Inventor: Mian Qin , Joo Hwan Lee , Rekha Pitchumani , Yang Seok Ki
Abstract: According to one general aspect, an apparatus may include a host interface circuit configured to receive offloading instructions from a host processing device, wherein the offloading instructions instruct the apparatus to compute an error correction code associated with a plurality of data elements. The apparatus may include a memory interface circuit configured to receive the plurality of data elements. The apparatus may include a plurality of memory buffer circuits configured to temporarily store the plurality of data elements. The apparatus may include a plurality of error code computation circuits configured to, at least in part, compute the error correction code without additional processing by the host processing device.
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