公开(公告)号：US20150004783A1

公开(公告)日：2015-01-01

申请号：US14286170

申请日：2014-05-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jong-Ho LEE ,  Min-Keun KWAK ,  Bum-Joon YOUN ,  Sung-Won CHOI

IPC: H01L21/768

CPC classification number: H01L21/76843 ,  H01L21/28088 ,  H01L21/823437 ,  H01L21/823842 ,  H01L27/10876 ,  H01L29/4236 ,  H01L29/66545

Abstract: A method for making a semiconductor device includes forming a trench in a first layer on a substrate. A conductive layer having a pattern is formed in the trench. A first metal gate electrode is formed on the conductive layer, and a second metal gate electrode is formed on the first metal gate electrode. The first and second metal gate electrodes at least partially conform to the pattern of the conductive layer. Widths of first surfaces of the first and second metal gate electrodes are different from respective widths of second surfaces of the first and second metal gate electrodes as a result of the pattern.

Abstract translation: 制造半导体器件的方法包括在衬底上的第一层中形成沟槽。 在沟槽中形成具有图案的导电层。 第一金属栅电极形成在导电层上，第二金属栅电极形成在第一金属栅电极上。 第一和第二金属栅电极至少部分地符合导电层的图案。 作为图案的结果，第一和第二金属栅电极的第一表面的宽度不同于第一和第二金属栅电极的第二表面的宽度。