公开(公告)号：US20220399359A1

公开(公告)日：2022-12-15

申请号：US17693875

申请日：2022-03-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Choasub KIM ,  Dongmin KYEON ,  Shinyoung KIM ,  Hayan PARK ,  Youngsun CHO ,  Changhyun HUR

IPC: H01L27/11565 ,  H01L27/11519 ,  H01L27/11556 ,  H01L27/11582

Abstract: A semiconductor device includes a memory cell region positioned on a substrate and comprising a real memory cell region and a dummy memory cell region; and a connection region extending in a first direction parallel to a surface of the substrate in the memory cell region. The dummy memory cell region includes a plurality of dummy vertical channel structures spaced apart from each other. Each of the plurality of dummy vertical channel structures includes a vertical channel pattern in contact with the substrate while penetrating a stack structure comprising a plurality of insulating layers and a plurality of gate electrodes repeatedly stacked in a third direction perpendicular to a surface of the substrate. A protection pattern is disposed to surround the vertical channel pattern of at least one of the plurality of dummy vertical channel structures.