公开(公告)号：US20190373730A1

公开(公告)日：2019-12-05

申请号：US16207339

申请日：2018-12-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Byung-guk SEO ,  Sun-ki YUN ,  Su-jin KIM ,  Hwi-jong YOO ,  Young-rok OH

IPC: H05K1/18 ,  H05K1/11 ,  G11C5/04

Abstract: A memory system includes a printed circuit board, at least one memory chip mounted on the printed circuit board, and a memory controller arranged on the printed circuit board and connected to 2N (where N is an integer of 2 or more) channels, the memory controller configured to perform a write operation and a read operation on the at least one memory chip. In the printed circuit board, a first subset of the channels corresponds to a first channel group configured in a point to point topology, and a remaining subset of the channels corresponds to a second channel group configured in a daisy chain topology.

公开(公告)号：US20210022249A1

公开(公告)日：2021-01-21

申请号：US17060833

申请日：2020-10-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Byung-guk SEO ,  Sun-ki YUN ,  Su-jin KIM ,  Hwi-jong YOO ,  Young-rok OH

IPC: H05K1/18 ,  H05K1/11 ,  G11C5/04

Abstract: A memory system includes a printed circuit board, at least one memory chip mounted on the printed circuit board, and a memory controller arranged on the printed circuit board and connected to 2N (where N is an integer of 2 or more) channels, the memory controller configured to perform a write operation and a read operation on the at least one memory chip. In the printed circuit board, a first subset of the channels corresponds to a first channel group configured in a point to point topology, and a remaining subset of the channels corresponds to a second channel group configured in a daisy chain topology.