公开(公告)号：US20230014935A1

公开(公告)日：2023-01-19

申请号：US17734462

申请日：2022-05-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sunhong PARK ,  Hyunjong OH

IPC: H05K1/02 ,  H05K1/11

Abstract: A printed circuit board, in which two or more copper clad laminates (CCLs) are laminated vertically from an uppermost circuit layer to a lowermost circuit layer, includes a non-destructive testing area, mislamination identifying portions in the non-destructive testing area, the mislamination identifying portions being in the CCLs, respectively, through-via holes vertically exposing the mislamination identifying portions, respectively, in the non-destructive testing area, the through-via holes being spaced apart from each other by a first interval, and a probe via extending vertically and being in contact with an end portion of each of the mislamination identifying portions on a same side. A length of the mislamination identifying portion in an N-th (N is an integer of 1 to K) layer CCL in a horizontal direction is longer than a length of the mislamination identifying positioned in an (N-1)-th layer CCL in the horizontal direction.