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公开(公告)号：US10516405B2
公开(公告)日：2019-12-24
申请号：US16027646
申请日：2018-07-05
Applicant: Samsung Electronics Co., Ltd.
Inventor： Won Sik Yu , Woo Seok Kim , Ji Hyun Kim , Tae Ik Kim
Abstract: A semiconductor device includes a time-to-digital converter (TDC) that receives a reference frequency signal and a feedback frequency signal, and outputs a first digital signal indicating a time difference between the reference frequency signal and the feedback frequency signal; a digital loop filter (DLF) that outputs a second digital signal generated by filtering the first digital signal; a multiplier circuit that outputs one of a third digital signal and a final test signal, the third digital signal generated by performing a multiplication operation on the second digital signal using a multiplication coefficient; a digital-controlled oscillator (DCO) that generates an oscillation signal having a frequency based on the output one of the third digital signal and the final test signal; and a loop gain calibrator (LGC) that receives the oscillation signal, generates a pair of test signals, and determines the multiplication coefficient using the pair of test signals.
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公开(公告)号：US10951215B2
公开(公告)日：2021-03-16
申请号：US16722362
申请日：2019-12-20
Applicant: Samsung Electronics Co., Ltd.
Inventor： Won Sik Yu , Woo Seok Kim , Ji Hyun Kim , Tae Ik Kim
Abstract: A semiconductor device includes a time-to-digital converter (TDC) that receives a reference frequency signal and a feedback frequency signal, and outputs a first digital signal indicating a time difference between the reference frequency signal and the feedback frequency signal; a digital loop filter (DLF) that outputs a second digital signal generated by filtering the first digital signal; a multiplier circuit that outputs one of a third digital signal and a final test signal, the third digital signal generated by performing a multiplication operation on the second digital signal using a multiplication coefficient; a digital-controlled oscillator (DCO) that generates an oscillation signal having a frequency based on the output one of the third digital signal and the final test signal; and a loop gain calibrator (LGC) that receives the oscillation signal, generates a pair of test signals, and determines the multiplication coefficient using the pair of test signals.
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公开(公告)号：US11005484B2
公开(公告)日：2021-05-11
申请号：US16216226
申请日：2018-12-11
Applicant: Samsung Electronics Co., Ltd.
Inventor： Gyu Sik Kim , Woo Seok Kim , Tae Ik Kim , Hwan Seok Yeo
Abstract: A phase locked loop circuit includes a voltage controlled oscillator configured to output a clock signal having a predetermined frequency based in a control voltage, a phase frequency detector configured to compare the clock signal with a reference signal to output a first control signal and a second control signal, a charge pump configured to output the control voltage based on the first control signal and the second control signal, a voltage supply including an output terminal connected to an output terminal of the charge pump by a transmission switch, and a leakage remover circuit connected to the transmission switch and configured to remove a leakage current flowing through the transmission switch while the transmission switch is turned-off.
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