公开(公告)号：US11211450B2

公开(公告)日：2021-12-28

申请号：US16033488

申请日：2018-07-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jae-hyun Park ,  Kye-hyun Baek ,  Yong-ho Jeon ,  Cheol Kim ,  Sung-il Park ,  Yun-il Lee ,  Hyung-suk Lee

IPC: H01L29/06 ,  H01L27/088 ,  H01L21/8234 ,  H01L29/66

Abstract: An integrated circuit (IC) device includes a first region and a second region adjacent to each other along a first direction on a substrate, fin patterns in each of the first and second regions extending along a second direction perpendicular to the first direction; gate electrodes extending along the first direction and intersecting the fin patterns; and an isolation region between the first and second regions, a bottom of the isolation region having a non-uniform height relative to a bottom of the substrate.

公开(公告)号：US12218193B2

公开(公告)日：2025-02-04

申请号：US17528251

申请日：2021-11-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jae-hyun Park ,  Kye-hyun Baek ,  Yong-ho Jeon ,  Cheol Kim ,  Sung-il Park ,  Yun-il Lee ,  Hyung-suk Lee

IPC: H01L29/06 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/66

Abstract: An integrated circuit (IC) device includes a first region and a second region adjacent to each other along a first direction on a substrate, fin patterns in each of the first and second regions extending along a second direction perpendicular to the first direction; gate electrodes extending along the first direction and intersecting the fin patterns; and an isolation region between the first and second regions, a bottom of the isolation region having a non-uniform height relative to a bottom of the substrate.

公开(公告)号：US20190280087A1

公开(公告)日：2019-09-12

申请号：US16033488

申请日：2018-07-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jae-hyun Park ,  Kye-hyun Baek ,  Yong-ho Jeon ,  Cheol Kim ,  Sung-il Park ,  Yun-il Lee ,  Hyung-suk Lee

IPC: H01L29/06 ,  H01L27/088

Abstract: An integrated circuit (IC) device includes a first region and a second region adjacent to each other along a first direction on a substrate, fin patterns in each of the first and second regions extending along a second direction perpendicular to the first direction; gate electrodes extending along the first direction and intersecting the fin patterns; and an isolation region between the first and second regions, a bottom of the isolation region having a non-uniform height relative to a bottom of the substrate.