System And Method For Implementing An Oscillator
    1.
    发明申请
    System And Method For Implementing An Oscillator 有权
    用于实现振荡器的系统和方法

    公开(公告)号:US20100231311A1

    公开(公告)日:2010-09-16

    申请号:US12433336

    申请日:2009-04-30

    IPC分类号: H03B5/24

    CPC分类号: H03B5/24

    摘要: In one embodiment, a system for generating an oscillating signal includes a transconductance amplifier comprising a single-ended output and a differential input. The system also includes only one feedback loop coupled to the transconductance amplifier. The feedback loop includes a low pass filter configured to receive the output of the transconductance amplifier. Also, the feedback loop includes a high pass filter configured to receive the output of the first low pass filter and output a signal to only one terminal of the differential input of the transconductance amplifier.

    摘要翻译: 在一个实施例中,用于产生振荡信号的系统包括跨导放大器,其包括单端输出和差分输入。 该系统还仅包括耦合到跨导放大器的一个反馈环路。 反馈回路包括配置成接收跨导放大器的输出的低通滤波器。 此外,反馈回路包括高通滤波器,其被配置为接收第一低通滤波器的输出并将信号输出到跨导放大器的差分输入的仅一个端子。

    Neural network, processor, and pattern recognition apparatus
    2.
    发明授权
    Neural network, processor, and pattern recognition apparatus 失效
    神经网络,处理器和模式识别装置

    公开(公告)号:US5519811A

    公开(公告)日:1996-05-21

    申请号:US971823

    申请日:1993-02-17

    IPC分类号: G06F15/18 G06K9/46 G06N3/063

    CPC分类号: G06K9/4628 G06N3/0635

    摘要: Apparatus for realizing a neural network of a complex structure, such as the Neocognitron, in a neural network processor comprises processing elements corresponding to the neurons of a multilayer feed-forward neural network. Each of the processing elements comprises an MOS analog circuit that receives input voltage signals and provides output voltage signals. The MOS analog circuits are arranged in a systolic array.

    摘要翻译: PCT No.PCT / JP91 / 01421 Sec。 371日期:1993年2月17日 102(e)日期1993年2月17日PCT 1991年10月17日PCT PCT。 出版物WO93 / 0852800 日期:1993年04月29日。在神经网络处理器中实现诸如Neocognitron的复杂结构的神经网络的装置包括对应于多层前馈神经网络的神经元的处理元件。 每个处理元件包括接收输入电压信号并提供输出电压信号的MOS模拟电路。 MOS模拟电路以收缩阵列排列。

    Neural network processor including systolic array of two-dimensional
layers
    3.
    发明授权
    Neural network processor including systolic array of two-dimensional layers 失效
    神经网络处理器包括二维层的收缩阵列

    公开(公告)号:US5627943A

    公开(公告)日:1997-05-06

    申请号:US542832

    申请日:1995-10-13

    摘要: The invention provides a pattern recognition processing apparatus and a technique for realizing a neural network of a complex structure within the processing apparatus. The apparatus includes a neural network having two-dimensional layers connected to form a feed-forward systolic array. Each two dimensional layer includes a feature extraction layer connected with a positional error absorbing layer. A host system provides inputs to the network. Each layer within the network includes processing elements such as a MOS analog circuit that receives input voltage signals and provides output voltage signals.

    摘要翻译: 本发明提供了一种用于在处理装置内实现复杂结构的神经网络的模式识别处理装置和技术。 该装置包括具有连接形成前馈收缩阵列的二维层的神经网络。 每个二维层包括与位置误差吸收层连接的特征提取层。 主机系统为网络提供输入。 网络中的每个层包括诸如接收输入电压信号并提供输出电压信号的MOS模拟电路的处理元件。

    Low Drop Out Voltage Regulator
    4.
    发明申请
    Low Drop Out Voltage Regulator 审中-公开
    低压降稳压器

    公开(公告)号:US20120212199A1

    公开(公告)日:2012-08-23

    申请号:US13155154

    申请日:2011-06-07

    IPC分类号: G05F1/575

    CPC分类号: G05F1/575

    摘要: A low dropout voltage regulator (LDO) is presented that takes into consideration short channel effects of the pass transistor in suppressing ripples that are present at the input node of the LDO from appearing at the output node of the LDO. A sum of the input ripple voltage and the input ripple voltage multiplied by a gain equal to the reciprocal of the intrinsic gain provided by the pass transistor is fed to the gate of the pass transistor. In one embodiment an adaptive stage is utilized to provide the sum to the gate of the pass transistor. The adaptive stage gain adapts to change changing load currents such that the gate voltage is maintained substantially equal to the sum. In another embodiment, the LDO is provided stability by using only on-chip capacitors. The LDO provides stable operation even at small load currents.

    摘要翻译: 提出了一种低压差稳压器(LDO),其考虑了传导晶体管的短沟道效应,以抑制存在于LDO的输入节点处的波纹,以出现在LDO的输出节点处。 输入纹波电压和输入纹波电压的乘积加上等于由传输晶体管提供的本征增益的倒数的增益馈送到传输晶体管的栅极。 在一个实施例中,利用自适应级将和提供给传输晶体管的栅极。 自适应级增益适应于改变变化的负载电流,使得栅极电压保持基本上等于和。 在另一个实施例中,通过仅使用片上电容器来提供LDO的稳定性。 LDO即使在小负载电流下也能提供稳定的工作。