公开(公告)号：US20190189020A1

公开(公告)日：2019-06-20

申请号：US15841847

申请日：2017-12-14

申请人： Saranjeet Singh Punia ,  Sourav Nandy ,  Sanjay Dubey ,  Adrian Resendez

发明人： Saranjeet Singh Punia ,  Sourav Nandy ,  Sanjay Dubey ,  Adrian Resendez

IPC分类号： G09B5/12 ,  G06F17/30 ,  G06F15/18

CPC分类号： G09B5/12 ,  G06F16/24578 ,  G06F16/437 ,  G06N20/00

摘要： Arrangements for delivering educational content to students are disclosed. The arrangements can include a method that includes registering a student by interviewing the student and storing information associated with the student's educational history and generating parameters and variables related to the student's prior educational experiences. A query for educational content can be received from the student, with student selectable filters and tailored search criteria for educational materials can be generated based on the variables, and parameters associated with the student and the received query. The results of the search can be transmitted to a search engine and tailored search results can be received and displayed to the student. The system can be self-learning where after use by students, student specific profiles and user models can be generated which can increase the number of user parameters and variables and supplementary information in the student's profile and or model.

公开(公告)号：US07750511B2

公开(公告)日：2010-07-06

申请号：US11733435

申请日：2007-04-10

申请人： Vikas Agarwal ,  Asit S. Ambekar ,  Sanjay Dubey ,  Saiful Islam

发明人： Vikas Agarwal ,  Asit S. Ambekar ,  Sanjay Dubey ,  Saiful Islam

IPC分类号： H02H3/00

CPC分类号： H01L27/0805 ,  G06F1/26 ,  H01L27/0629 ,  Y10T307/865

摘要： An integrated circuit (IC) includes power supply interconnects that couple to a power source. The integrated circuit includes electronic devices that perform desired functions and further includes decoupling capacitor circuits that provide noise reduction throughout the integrated circuit. In one embodiment, each decoupling capacitor circuit includes a decoupling capacitor and a switching circuit. The switching circuit connects the decoupling capacitor to the power supply interconnects during a connect mode when the switching circuit detects no substantial decoupling capacitor leakage. However, the switching circuit effectively disconnects the decoupling capacitor from the power supply interconnects during a disconnect mode when the switching circuit detects substantial decoupling capacitor leakage. The decoupling capacitor circuit self-initializes in the connect mode without external control signals and is thus self-contained. Because of the self-contained nature of the decoupling capacitor circuit, an integrated circuit may contain an array of decoupling capacitor circuits without expenditure of substantial chip real estate for respective decoupling capacitor control lines.

摘要翻译： 集成电路（IC）包括耦合到电源的电源互连。 集成电路包括执行所需功能的电子器件，还包括在整个集成电路中提供降噪的去耦电容器电路。 在一个实施例中，每个解耦电容器电路包括去耦电容器和开关电路。 当开关电路检测到没有实质的去耦电容器泄漏时，开关电路在连接模式期间将去耦电容器连接到电源互连。 然而，当开关电路检测到实质的去耦电容器泄漏时，开关电路在断开模式期间有效地将去耦电容器与电源互连件断开。 去耦电容电路在连接模式下自我初始化，无需外部控制信号，因此是独立的。 由于去耦电容电路的自包含性质，集成电路可能包含一个去耦电容电路的阵列，而不需要相应的去耦电容器控制线的大量芯片空间。

公开(公告)号：US20100308663A1

公开(公告)日：2010-12-09

申请号：US12478477

申请日：2009-06-04

申请人： Vikas Agarwal ,  Sanjay Dubey ,  Ankit K. Gheedia ,  Nikhil Kejriwal ,  Sankara Reddy S. Kommareddi

发明人： Vikas Agarwal ,  Sanjay Dubey ,  Ankit K. Gheedia ,  Nikhil Kejriwal ,  Sankara Reddy S. Kommareddi

IPC分类号： H02J1/00

CPC分类号： G11C29/02 ,  G11C2029/5006 ,  H01L22/22

摘要： The present invention generally provides a decoupling capacitor circuit that is configured to determine whether a decoupling capacitor is defective. Upon determining that the decoupling capacitor is defective, the decoupling capacitor circuit may disconnect the decoupling capacitor from both, a positive segment and a negative segment of a power grid. In some embodiments, the decoupling capacitor circuit may be configured to reconnect the decoupling capacitor to the power grid upon receiving a reset signal.

摘要翻译： 本发明通常提供一种去耦电容器电路，其被配置为确定去耦电容器是否有缺陷。 在确定去耦电容器有缺陷时，去耦电容器电路可以将去耦电容器与电网的正段和负段断开。 在一些实施例中，解耦电容器电路可以被配置为在接收到复位信号时将去耦电容器重新连接到电网。

公开(公告)号：US07545176B2

公开(公告)日：2009-06-09

申请号：US11923714

申请日：2007-10-25

申请人： Vikas Agarwal ,  Sanjay Dubey ,  Saiful Islam ,  Gaurav Mittal

发明人： Vikas Agarwal ,  Sanjay Dubey ,  Saiful Islam ,  Gaurav Mittal

IPC分类号： H03K19/0175 ,  H03K19/094

CPC分类号： H03K5/151 ,  H03K19/0008

摘要： An energy-saving circuit and method using charge equalization across complementary nodes reduces power consumption in memory circuits and other circuits such as wide multiplexers having complementary high-capacitance nodes. A change detection circuit detects a state change to be applied to the bitlines, and generates a pulse if a state change is to be applied. A pass gate connected between the nodes is activated in response to the pulse to equalize the charge on the bitlines. The driver circuit enable inputs are also delayed, so that the bitlines are not driven until after the charge has been equalized and the pass gate disabled. In one embodiment, the driver circuits are only enabled momentarily by a pulsed output of the change detector and keeper circuits are employed to retain the bitlines in their asserted states.

摘要翻译： 在互补节点上使用电荷均衡的节能电路和方法降低存储器电路和其它电路中的功耗，例如具有互补高电容节点的宽多路复用器。 改变检测电路检测要施加到位线的状态变化，并且如果要施加状态改变则产生脉冲。 连接在节点之间的通过门被响应于脉冲激活以均衡位线上的电荷。 驱动电路使能输入也被延迟，使得位线不被驱动，直到电荷被均衡并且通路禁止。 在一个实施例中，驱动器电路仅通过变化检测器的脉冲输出暂时使能，并且使用保持器电路将位线保持在其断言状态。

公开(公告)号：US20090108920A1

公开(公告)日：2009-04-30

申请号：US11923714

申请日：2007-10-25

申请人： Vikas Agarwal ,  Sanjay Dubey ,  Saiful Islam ,  Gaurav Mittal

发明人： Vikas Agarwal ,  Sanjay Dubey ,  Saiful Islam ,  Gaurav Mittal

IPC分类号： G05F1/10

CPC分类号： H03K5/151 ,  H03K19/0008

摘要： An energy-saving circuit and method using charge equalization across complementary nodes reduces power consumption in memory circuits and other circuits such as wide multiplexers having complementary high-capacitance nodes. A change detection circuit detects a state change to be applied to the bitlines, and generates a pulse if a state change is to be applied. A pass gate connected between the nodes is activated in response to the pulse to equalize the charge on the bitlines. The driver circuit enable inputs are also delayed, so that the bitlines are not driven until after the charge has been equalized and the pass gate disabled. In one embodiment, the driver circuits are only enabled momentarily by a pulsed output of the change detector and keeper circuits are employed to retain the bitlines in their asserted states.

摘要翻译： 在互补节点上使用电荷均衡的节能电路和方法降低存储器电路和其它电路中的功耗，例如具有互补高电容节点的宽多路复用器。 改变检测电路检测要施加到位线的状态变化，并且如果要施加状态改变则产生脉冲。 连接在节点之间的通过门被响应于脉冲激活以均衡位线上的电荷。 驱动电路使能输入也被延迟，使得位线不被驱动，直到电荷被均衡并且通路禁止。 在一个实施例中，驱动器电路仅通过变化检测器的脉冲输出暂时使能，并且使用保持器电路将位线保持在其断言状态。

公开(公告)号：US20080251888A1

公开(公告)日：2008-10-16

申请号：US11733435

申请日：2007-04-10

申请人： Vikas Agarwal ,  Asit S. Ambekar ,  Sanjay Dubey ,  Saiful Islam

发明人： Vikas Agarwal ,  Asit S. Ambekar ,  Sanjay Dubey ,  Saiful Islam

IPC分类号： H01L27/02

CPC分类号： H01L27/0805 ,  G06F1/26 ,  H01L27/0629 ,  Y10T307/865

摘要： An integrated circuit (IC) includes power supply interconnects that couple to a power source. The integrated circuit includes electronic devices that perform desired functions and further includes decoupling capacitor circuits that provide noise reduction throughout the integrated circuit. In one embodiment, each decoupling capacitor circuit includes a decoupling capacitor and a switching circuit. The switching circuit connects the decoupling capacitor to the power supply interconnects during a connect mode when the switching circuit detects no substantial decoupling capacitor leakage. However, the switching circuit effectively disconnects the decoupling capacitor from the power supply interconnects during a disconnect mode when the switching circuit detects substantial decoupling capacitor leakage. The decoupling capacitor circuit self-initializes in the connect mode without external control signals and is thus self-contained. Because of the self-contained nature of the decoupling capacitor circuit, an integrated circuit may contain an array of decoupling capacitor circuits without expenditure of substantial chip real estate for respective decoupling capacitor control lines.

摘要翻译： 集成电路（IC）包括耦合到电源的电源互连。 集成电路包括执行所需功能的电子器件，还包括在整个集成电路中提供降噪的去耦电容器电路。 在一个实施例中，每个去耦电容器电路包括去耦电容器和开关电路。 当开关电路检测到没有实质的去耦电容器泄漏时，开关电路在连接模式期间将去耦电容器连接到电源互连。 然而，当开关电路检测到实质的去耦电容器泄漏时，开关电路在断开模式期间有效地将去耦电容器与电源互连件断开。 去耦电容电路在连接模式下自我初始化，无需外部控制信号，因此是独立的。 由于去耦电容电路的自包含性质，集成电路可能包含一个去耦电容电路的阵列，而不需要相应的去耦电容器控制线的大量芯片空间。

公开(公告)号：US07194501B2

公开(公告)日：2007-03-20

申请号：US10278440

申请日：2002-10-22

申请人： Sanjay Dubey ,  Yoganand Chillarige ,  Shivakumar Sompur ,  Ban P. Wong ,  Cynthia Tran

发明人： Sanjay Dubey ,  Yoganand Chillarige ,  Shivakumar Sompur ,  Ban P. Wong ,  Cynthia Tran

IPC分类号： G06F7/50

CPC分类号： G06F7/506 ,  G06F2207/3836

摘要： An arithmetic logic unit (ALU) implemented with complementary pass gate logic using propagate, generate, and kill is provided. Broadly speaking, the ALU is a 64-bit ALU using a multi-stage global carry chain to generate intermediate fourth-bit carries that are folded with local four-bit sums to efficiently generate a final sum output. The ALU implements ones complement subtraction by incorporating a subtraction select signal to invert each bit of a second operand. The ALU circuitry implements a push-pull methodology to improve performance.

摘要翻译： 提供了使用传播，生成和杀死的互补传递门逻辑实现的算术逻辑单元（ALU）。 一般来说，ALU是使用多级全局进位链的64位ALU，用于生成中间的第四位运算，它们以局部四位和折叠，以有效地产生最终和输出。 ALU通过结合减法选择信号来反转第二个操作数的每一位来实现一个补码减法。 ALU电路实现推挽方法来提高性能。

公开(公告)号：US08009398B2

公开(公告)日：2011-08-30

申请号：US12478477

申请日：2009-06-04

申请人： Vikas Agarwal ,  Sanjay Dubey ,  Ankit K. Gheedia ,  Nikhil Kejriwal ,  Sankara Reddy S. Kommareddi

发明人： Vikas Agarwal ,  Sanjay Dubey ,  Ankit K. Gheedia ,  Nikhil Kejriwal ,  Sankara Reddy S. Kommareddi

IPC分类号： H02H3/22

CPC分类号： G11C29/02 ,  G11C2029/5006 ,  H01L22/22

摘要： The present invention generally provides a decoupling capacitor circuit that is configured to determine whether a decoupling capacitor is defective. Upon determining that the decoupling capacitor is defective, the decoupling capacitor circuit may disconnect the decoupling capacitor from both, a positive segment and a negative segment of a power grid. In some embodiments, the decoupling capacitor circuit may be configured to reconnect the decoupling capacitor to the power grid upon receiving a reset signal.

摘要翻译： 本发明通常提供一种去耦电容器电路，其被配置为确定去耦电容器是否有缺陷。 在确定去耦电容器有缺陷时，去耦电容器电路可以将去耦电容器与电网的正段和负段断开。 在一些实施例中，解耦电容器电路可以被配置为在接收到复位信号时将去耦电容器重新连接到电网。

公开(公告)号：US07895561B2

公开(公告)日：2011-02-22

申请号：US11970787

申请日：2008-01-08

申请人： Sanjay Dubey ,  Gaurav Mittal

发明人： Sanjay Dubey ,  Gaurav Mittal

IPC分类号： G06F17/50

CPC分类号： G06F17/5068 ,  G06F17/5045

摘要： A system and method that uses a text-based script file to capture a circuit design and allows a circuit designer to manipulate the script file. The circuit designer can add, delete, or move components using various tags and commands that are stored in the script file. When the design is complete, or ready to be tested, the script file is processed creating a layout representation file that is readable by a graphics-based circuit design tool.

摘要翻译： 一种使用基于文本的脚本文件捕获电路设计并允许电路设计者操纵脚本文件的系统和方法。 电路设计师可以使用存储在脚本文件中的各种标签和命令来添加，删除或移动组件。 当设计完成或准备测试时，会处理脚本文件，创建一个可由基于图形的电路设计工具读取的布局表示文件。

公开(公告)号：US20080098343A1

公开(公告)日：2008-04-24

申请号：US11970787

申请日：2008-01-08

申请人： Sanjay Dubey ,  Gaurav Mittal

发明人： Sanjay Dubey ,  Gaurav Mittal

IPC分类号： G06F17/50

CPC分类号： G06F17/5068 ,  G06F17/5045

摘要： A system and method that uses a text-based script file to capture a circuit design and allows a circuit designer to manipulate the script file. The circuit designer can add, delete, or move components using various tags and commands that are stored in the script file. When the design is complete, or ready to be tested, the script file is processed creating a layout representation file that is readable by a graphics-based circuit design tool.

摘要翻译： 一种使用基于文本的脚本文件捕获电路设计并允许电路设计者操纵脚本文件的系统和方法。 电路设计师可以使用存储在脚本文件中的各种标签和命令来添加，删除或移动组件。 当设计完成或准备测试时，会处理脚本文件，创建一个可由基于图形的电路设计工具读取的布局表示文件。