公开(公告)号：US20070210404A1

公开(公告)日：2007-09-13

申请号：US11652013

申请日：2007-01-11

申请人： Satoshi Umekita ,  Tomomi Ajioka ,  Kenji Hirose ,  Yoshihiko Yasu ,  Yujiro Miyairi

发明人： Satoshi Umekita ,  Tomomi Ajioka ,  Kenji Hirose ,  Yoshihiko Yasu ,  Yujiro Miyairi

IPC分类号： H01L29/00

CPC分类号： H01L27/0203

摘要： Repeaters are arranged at arbitrary positions to substantially improve transmission speed of a signal. In the semiconductor integrated circuit device 1, repeater regions 10 where repeaters are provided as relay points for wiring are provided in the central parts of the core power source regions 2, 3 and 5, on the left side of the core power source regions 4 to 8 and at the upper and lower parts of the semiconductor integrated circuit device 1. A power switch region for repeater 11 is formed so as to surround the core power source regions 2 to 8 and the repeater regions 10. The power source lines of the reference potential connected to the repeater regions 10 are laid out at equally spaced intervals throughout the core power source regions 2 to 8, which enables the repeater regions 10 to be flexibly laid out. This permits the repeaters to be more effectively arranged, which improves the performances of semiconductor integrated circuit device 1.

摘要翻译： 中继器被布置在任意位置以显着提高信号的传输速度。 在半导体集成电路装置1中，在核心电源区域2,3和5的核心电源区域4的左侧设置有作为布线用继电器点的中继器的中继器区域10， 半导体集成电路装置1的上部和下部。中继器11的电源开关区域形成为围绕核心电源区域2至8和中继器区域10.参考电源线 连接到中继器区域10的电位在整个核心电源区域2至8中以均匀间隔布置，这使得中继器区域10能够被灵活布置。 这允许更有效地布置中继器，这改善了半导体集成电路装置1的性能。

公开(公告)号：US20080224177A1

公开(公告)日：2008-09-18

申请号：US12126019

申请日：2008-05-23

申请人： Satoshi Umekita ,  Tomomi Ajioka ,  Kenji Hirose ,  Yoshihiko Yasu ,  Yujiro Miyairi

发明人： Satoshi Umekita ,  Tomomi Ajioka ,  Kenji Hirose ,  Yoshihiko Yasu ,  Yujiro Miyairi

IPC分类号： H01L27/10

CPC分类号： H01L27/0203

摘要： Repeaters are arranged at arbitrary positions to substantially improve transmission speed of a signal. In the semiconductor integrated circuit device 1, repeater regions 10 where repeaters are provided as relay points for wiring are provided in the central parts of the core power source regions 2, 3 and 5, on the left side of the core power source regions 4 to 8 and at the upper and lower parts of the semiconductor integrated circuit device 1. A power switch region for repeater 11 is formed so as to surround the core power source regions 2 to 8 and the repeater regions 10. The power source lines of the reference potential connected to the repeater regions 10 are laid out at equally spaced intervals throughout the core power source regions 2 to 8, which enables the repeater regions 10 to be flexibly laid out. This permits the repeaters to be more effectively arranged, which improves the performances of semiconductor integrated circuit device 1.

摘要翻译： 中继器被布置在任意位置以显着提高信号的传输速度。 在半导体集成电路装置1中，在核心电源区域2,3和5的核心电源区域4的左侧设置有作为布线用继电器点的中继器的中继器区域10， 并且在半导体集成电路装置1的上部和下部。 中继器11的电源开关区域形成为围绕核心电源区域2至8和中继器区域10。 连接到中继器区域10的参考电位的电源线在整个核心电源区域2至8中以均匀间隔布置，这使得中继器区域10能够被灵活布置。 这允许更有效地布置中继器，这改善了半导体集成电路装置1的性能。

公开(公告)号：US07394143B2

公开(公告)日：2008-07-01

申请号：US11652013

申请日：2007-01-11

申请人： Satoshi Umekita ,  Tomomi Ajioka ,  Kenji Hirose ,  Yoshihiko Yasu ,  Yujiro Miyairi

发明人： Satoshi Umekita ,  Tomomi Ajioka ,  Kenji Hirose ,  Yoshihiko Yasu ,  Yujiro Miyairi

IPC分类号： H01L29/00

CPC分类号： H01L27/0203

摘要： Repeaters are arranged at arbitrary positions to substantially improve transmission speed of a signal. In the semiconductor integrated circuit device 1, repeater regions 10 where repeaters are provided as relay points for wiring are provided in the central parts of the core power source regions 2, 3 and 5, on the left side of the core power source regions 4 to 8 and at the upper and lower parts of the semiconductor integrated circuit device 1. A power switch region for repeater 11 is formed so as to surround the core power source regions 2 to 8 and the repeater regions 10. The power source lines of the reference potential connected to the repeater regions 10 are laid out at equally spaced intervals throughout the core power source regions 2 to 8, which enables the repeater regions 10 to be flexibly laid out. This permits the repeaters to be more effectively arranged, which improves the performances of semiconductor integrated circuit device 1.

摘要翻译： 中继器被布置在任意位置以显着提高信号的传输速度。 在半导体集成电路装置1中，在核心电源区域2,3和5的核心电源区域4的左侧设置有作为布线用继电器点的中继器的中继器区域10， 并且在半导体集成电路装置1的上部和下部。 中继器11的电源开关区域形成为围绕核心电源区域2至8和中继器区域10。 连接到中继器区域10的参考电位的电源线在整个核心电源区域2至8中以均匀间隔布置，这使得中继器区域10能够被灵活布置。 这允许更有效地布置中继器，这改善了半导体集成电路装置1的性能。

公开(公告)号：US07834381B2

公开(公告)日：2010-11-16

申请号：US12126019

申请日：2008-05-23

申请人： Satoshi Umekita ,  Tomomi Ajioka ,  Kenji Hirose ,  Yoshihiko Yasu ,  Yujiro Miyairi

发明人： Satoshi Umekita ,  Tomomi Ajioka ,  Kenji Hirose ,  Yoshihiko Yasu ,  Yujiro Miyairi

IPC分类号： H01L23/528

CPC分类号： H01L27/0203

摘要： Repeaters are arranged at arbitrary positions to substantially improve transmission speed of a signal. In the semiconductor integrated circuit device 1, repeater regions 10 where repeaters are provided as relay points for wiring are provided in the central parts of the core power source regions 2, 3 and 5, on the left side of the core power source regions 4 to 8 and at the upper and lower parts of the semiconductor integrated circuit device 1. A power switch region for repeater 11 is formed so as to surround the core power source regions 2 to 8 and the repeater regions 10. The power source lines of the reference potential connected to the repeater regions 10 are laid out at equally spaced intervals throughout the core power source regions 2 to 8, which enables the repeater regions 10 to be flexibly laid out. This permits the repeaters to be more effectively arranged, which improves the performances of semiconductor integrated circuit device 1.

摘要翻译： 中继器被布置在任意位置以显着提高信号的传输速度。 在半导体集成电路装置1中，在核心电源区域2,3和5的核心电源区域4的左侧设置有作为布线用继电器点的中继器的中继器区域10， 半导体集成电路器件1的上部和下部。中继器11的功率开关区域形成为围绕核心电源区域2至8和中继器区域10.参考电源线 连接到中继器区域10的电位在整个核心电源区域2至8中以均匀间隔布置，这使得中继器区域10能够被灵活布置。 这允许更有效地布置中继器，这改善了半导体集成电路装置1的性能。