公开(公告)号：US10936495B2

公开(公告)日：2021-03-02

申请号：US15942905

申请日：2018-04-02

Applicant: Seagate Technology LLC

Inventor： Sachin Sudhir Jagtap

IPC: G06F12/0842 ,  G06F12/0855 ,  G06F12/0895 ,  G06F12/0846

Abstract: Implementations disclosed herein include a system and method of storing one or more data and program data in a memory, temporarily storing the one or more data and the program data in a cache, managing the one or more data from the memory and the cache in a read data register and a read cache register, and managing the program data from the memory and the cache in a program data register and a program cache register, wherein each of the read data register and the read cache register are separate from the program data register and the program cache register. Read operations are performed only with the read data register and the read cache register. Program operations are performed only with the program data register and the program cache register.

公开(公告)号：US10585615B1

公开(公告)日：2020-03-10

申请号：US15976056

申请日：2018-05-10

Applicant: Seagate Technology LLC

Inventor： Prasad Ramchandra Kadam ,  Sachin Sudhir Jagtap ,  Kedar Patankar

IPC: G06F3/06 ,  G06F12/10

Abstract: An apparatus may include a virtual flash device configured to emulate a flash memory device. The virtual flash device may include a flash interface configured to communicate with a flash controller, an address translation module configured to translate memory addresses from a flash based memory space to another memory space of another memory, a metadata and control module configured to manage metadata from the emulation of the flash memory device, and a non-flash memory controller configured to communicate with the other memory.

公开(公告)号：US20190303296A1

公开(公告)日：2019-10-03

申请号：US15942905

申请日：2018-04-02

Applicant: Seagate Technology LLC

Inventor： Sachin Sudhir Jagtap

IPC: G06F12/0842

Abstract: Implementations disclosed herein include a system and method of storing one or more data and program data in a memory, temporarily storing the one or more data and the program data in a cache, managing the one or more data from the memory and the cache in a read data register and a read cache register, and managing the program data from the memory and the cache in a program data register and a program cache register, wherein each of the read data register and the read cache register are separate from the program data register and the program cache register. Read operations are performed only with the read data register and the read cache register. Program operations are performed only with the program data register and the program cache register.