-
公开(公告)号:US5917447A
公开(公告)日:1999-06-29
申请号:US654946
申请日:1996-05-29
CPC分类号: H01Q3/26
摘要: A digital beam forming system includes an array of computing units (60-76) for weighting incoming signals and a plurality of summing processors (80-84) for generating output signals that represent weighted sums corresponding to rows within the array. The digital beam forming system can be incorporated in either a transmitter or receiver used in a radio frequency communications system.
摘要翻译: 数字波束形成系统包括用于加权输入信号的计算单元阵列(60-76)和多个求和处理器(80-84),用于产生表示对应于阵列内的行的加权和的输出信号。 数字波束形成系统可以结合在射频通信系统中使用的发射机或接收机中。
-
公开(公告)号:US5452437A
公开(公告)日:1995-09-19
申请号:US794092
申请日:1991-11-18
申请人: James M. Richey , George L. Wang
发明人: James M. Richey , George L. Wang
CPC分类号: G06F11/22
摘要: In a data processing system comprising a plurality of processing elements coupled to a network, a method of single-stepping the processing elements aids in debugging the system. Only one processing element at a time is permitted to execute N steps while its data output is coupled to the network. Once it's finished executing, a time period greater than the maximum propagation delay time of the network is permitted to pass before stepping a succeeding processing element N steps. In another embodiment, the outputs of all processing elements to the network are first disabled, then all processing elements are allowed to execute N steps. Next the system is halted, and, one at a time, the data output of each processing element is coupled to the network, allowing sufficient time for each processing element's output to propagate through the network before coupling the output of a succeeding processing element.
摘要翻译: 在包括耦合到网络的多个处理元件的数据处理系统中,单步执行处理元件的方法有助于调试系统。 一次只允许一个处理元件执行N个步骤,同时其数据输出耦合到网络。 一旦完成执行,在步进后续处理元素N步骤之前,允许大于网络的最大传播延迟时间的时间段通过。 在另一个实施例中,首先禁止向网络的所有处理元件的输出,然后允许所有处理元件执行N个步骤。 接下来,停止系统,并且一个一个地,每个处理元件的数据输出耦合到网络,在耦合后续处理元件的输出之前,每个处理元件的输出允许足够的时间传播通过网络。
-