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公开(公告)号：US20070061463A1
公开(公告)日：2007-03-15
申请号：US11268525
申请日：2005-11-08
IPC分类号： G06F15/173
CPC分类号： G06F13/385 , G06F3/061 , G06F3/0659 , G06F3/0689
摘要： In a data processing system in which a host processing apparatus and a storage subsystem are connected via a channel interface, the present invention makes it possible to expand the number of logical device addresses in excess of the device address limitations of the channel interface, and also enhances the performance of parallel access processing for the same logical device. When an access request is generated for a logical device, the host processing apparatus stores the logical device address to be accessed in a prefix command of a channel command word (CCW) for the access request, sets this CCW in a device information block of a frame which complies with the channel interface, sets a parallel access identifier for identifying a plurality of accesses for the same device in a device address of this frame, and then sends this frame to the storage subsystem.
摘要翻译： 在通过信道接口连接主机处理装置和存储子系统的数据处理系统中，本发明可以扩展超过信道接口的设备地址限制的逻辑设备地址的数量， 增强同一逻辑设备并行访问处理的性能。 当为逻辑设备生成访问请求时，主机处理设备将访问请求的信道命令字（CCW）的前缀命令中存储要访问的逻辑设备地址，将该CCW设置在设备信息块中 符合通道接口的帧，设置用于识别该帧的设备地址中的同一设备的多个接入的并行接入标识符，然后将该帧发送到存储子系统。
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2.发明授权Data processing system configuring and transmitting access request frames with a field in channel command words to accommendate a plurality of logical device address data therein 有权数据处理系统通过信道命令字中的字段来配置和发送接入请求帧，以在其中建议多个逻辑设备地址数据公开(公告)号：US07373465B2
公开(公告)日：2008-05-13
申请号：US11268525
申请日：2005-11-08
IPC分类号： G06F13/00
CPC分类号： G06F13/385 , G06F3/061 , G06F3/0659 , G06F3/0689
摘要： In a data processing system in which a host processing apparatus and a storage subsystem are connected via a channel interface, the present invention makes it possible to expand the number of logical device addresses in excess of the device address limitations of the channel interface, and also enhances the performance of parallel access processing for the same logical device. When an access request is generated for a logical device, the host processing apparatus stores the logical device address to be accessed in a prefix command of a channel command word (CCW) for the access request, sets this CCW in a device information block of a frame which complies with the channel interface, sets a parallel access identifier for identifying a plurality of accesses for the same device in a device address of this frame, and then sends this frame to the storage subsystem.
摘要翻译： 在通过信道接口连接主机处理装置和存储子系统的数据处理系统中，本发明可以扩展超过信道接口的设备地址限制的逻辑设备地址的数量， 增强同一逻辑设备并行访问处理的性能。 当为逻辑设备生成访问请求时，主机处理设备将访问请求的信道命令字（CCW）的前缀命令中存储要访问的逻辑设备地址，将该CCW设置在设备信息块中 符合通道接口的帧，设置用于识别该帧的设备地址中的同一设备的多个接入的并行接入标识符，然后将该帧发送到存储子系统。
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