Apparatus for Cryptographic Operations on Information and Associated Methods

    公开(公告)号:US20240163077A1

    公开(公告)日:2024-05-16

    申请号:US17988741

    申请日:2022-11-16

    发明人: Steven Cooreman

    IPC分类号: H04L9/06

    CPC分类号: H04L9/0618

    摘要: An apparatus includes an encryption circuit. The encryption circuit includes a block function circuit to generate a plurality of blocks of output data. A block of output data having an initial sequence number includes more state than used by a ChaCha20 block function. A first part of a keystream is generated from a block of output data having the initial sequence number. A second part of the keystream is generated from blocks of output having sequence numbers other than the initial sequence number.

    Hardware Countermeasures Against DFA Attacks on AES Operations

    公开(公告)号:US20230412356A1

    公开(公告)日:2023-12-21

    申请号:US17844817

    申请日:2022-06-21

    发明人: Steven Cooreman

    IPC分类号: H04L9/00 H04L9/06

    摘要: A system and method of performing an AES encryption, while also determining whether a potentially successful DFA attack is underway is disclosed. When interim results are not visible, the DFA attack that is most likely to be succeed is initiated by introducing the fault between the MixColumns operation in the second to last round and the MixColumns operation in the next to last round. To detect this, the present system and method performs the next to last round and then repeats this next to last round. The results of the original round and repeated round are compared to identify a possible DFA attack. Importantly, the same hardware is used for the original round and the repeated round. In this way, the amount of additional hardware needed to detect a possibly successful DFA attack is minimized. Further, the impact on execution time may be 10% or less.

    Hardware countermeasures against DFA attacks on AES operations

    公开(公告)号:US12034831B2

    公开(公告)日:2024-07-09

    申请号:US17844817

    申请日:2022-06-21

    发明人: Steven Cooreman

    IPC分类号: H04L9/00 H04L9/06

    摘要: A system and method of performing an AES encryption, while also determining whether a potentially successful DFA attack is underway is disclosed. When interim results are not visible, the DFA attack that is most likely to be succeed is initiated by introducing the fault between the MixColumns operation in the second to last round and the MixColumns operation in the next to last round. To detect this, the present system and method performs the next to last round and then repeats this next to last round. The results of the original round and repeated round are compared to identify a possible DFA attack. Importantly, the same hardware is used for the original round and the repeated round. In this way, the amount of additional hardware needed to detect a possibly successful DFA attack is minimized. Further, the impact on execution time may be 10% or less.

    AES-GCM Engine Optimized for Execute-in-Place Authenticated Decryption

    公开(公告)号:US20240187402A1

    公开(公告)日:2024-06-06

    申请号:US18074744

    申请日:2022-12-05

    IPC分类号: H04L9/40

    CPC分类号: H04L63/083

    摘要: A system and method for performing execute-in-place is disclosed, wherein the code is encrypted using AES-GCM and stored in an external memory device. The system includes only one cipher function that is used to encrypt the three counter values that are used to decrypted the encrypted code and to validate the Message Authentication Code (MAC). In some embodiments, the system precalculates a hash subkey so that generation of the Counter 0 value can begin as soon as a valid memory address is available. In addition, the cipher function is modified to utilized two or more cipher generation circuits and only one key expansion circuit. This improves the speed of the operation without a complete duplication of the cipher function hardware. In another embodiment, the cipher function is unrolled so that two or more rounds of key expansion and cipher generation are performed each clock cycle.