FLASH MEMORY CONTROLLER AND ASSOCIATED CONTROL METHOD

    公开(公告)号:US20240377989A1

    公开(公告)日:2024-11-14

    申请号:US18623061

    申请日:2024-04-01

    Abstract: The present invention provides a flash memory controller configured to access a flash memory module. The flash memory controller includes a transmission interface circuit, a buffer memory and a microprocessor. The transmission interface circuit is coupled to a host device, and the transmission interface circuit includes a time queue, at least one virtual queue and a command processing circuit, wherein the command processing circuit is configured to receive a plurality commands from a host device, write information of the plurality of commands into the time queue in sequence, and write the information of at least part of the plurality of commands into the at least one virtual queue. The buffer memory is configured to store the plurality of commands. The microprocessor is configured to selectively read the time queue or the at least one virtual queue to read the information of the plurality of commands.

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