公开(公告)号：US20160124650A1

公开(公告)日：2016-05-05

申请号：US14920301

申请日：2015-10-22

Applicant: Silicon Motion, Inc.

Inventor： Yi-Kang Chang

IPC: G06F3/06

CPC classification number: G06F3/064 ,  G06F3/0604 ,  G06F3/0679 ,  G06F12/0246 ,  G06F2212/1016 ,  G06F2212/1044 ,  G06F2212/7202 ,  G06F2212/7205

Abstract: A flash memory control technology with high performance efficiency is provided. A microcontroller is configured to build an ending logical address table in a random access memory to record ending logical addresses of a plurality of old write commands issued from a host. The microcontroller is further configured to compare a starting address of a current write command issued from the host and information in the ending logical address table, to determine whether any of the plurality of old write commands is a former string write command with respect to the current write command that the former string write command and the current write command combined together form sequential data writing. The microcontroller is further configured to overwrite an ending logical address of the current write command onto a column in the ending logical address table recording the ending logical address of the former string write command.

Abstract translation: 提供了高效率的闪存控制技术。 微控制器被配置为在随机存取存储器中构建结束逻辑地址表，以记录从主机发出的多个旧写命令的结束逻辑地址。 微控制器还被配置为比较从主机发出的当前写入命令的起始地址和结束逻辑地址表中的信息，以确定多个旧写入命令中的任何一个是相对于当前的前一个字符串写入命令 写命令，前一个字符串写命令和当前写命令组合在一起形成顺序数据写入。 微控制器还被配置为将当前写入命令的结束逻辑地址重写到记录前一字符串写入命令的结束逻辑地址的结束逻辑地址表中的列上。

公开(公告)号：US20160124845A1

公开(公告)日：2016-05-05

申请号：US14839073

申请日：2015-08-28

Applicant: Silicon Motion, Inc.

Inventor： Yi-Kang Chang

IPC: G06F12/02 ,  G06F12/10

CPC classification number: G06F12/0246 ,  G06F12/1009 ,  G06F2212/7201

Abstract: A flash memory control technology with high efficiency, which records a logical page table in a random access memory. The logical pages that have been collected from a data-interspersed block into a destination block of a flash memory are recorded in the logical page table. Without accessing a logical-to-physical address mapping table stored in the flash memory, the physical pages in the data-interspersed block corresponding to the logical pages recorded in the logical page table are regarded as containing invalid data.

Abstract translation: 一种高效率的闪存控制技术，在随机存取存储器中记录逻辑页表。 从数据散布的块中收集到闪存的目的地块中的逻辑页被记录在逻辑页表中。 在不访问存储在闪速存储器中的逻辑到物理地址映射表的情况下，与逻辑页表中记录的逻辑页对应的数据散布块中的物理页被视为包含无效数据。

公开(公告)号：US11334480B2

公开(公告)日：2022-05-17

申请号：US16885627

申请日：2020-05-28

Applicant: Silicon Motion, Inc.

Inventor： Jie-Hao Lee ,  Yi-Kang Chang ,  Hsuan-Ping Lin

IPC: G06F12/02 ,  G06F12/0811 ,  G06F9/30 ,  G06F12/0882

Abstract: An efficient control technology for non-volatile memory is shown. A non-volatile memory provides a storage space that is divided into blocks. When programming the write data issued by the host to the non-volatile memory, the programming order of the blocks is recorded. Garbage collection is based on the recorded programming order.
Sequential data can be collected to the destination block in sequence.

公开(公告)号：US10089225B2

公开(公告)日：2018-10-02

申请号：US14839073

申请日：2015-08-28

Applicant: Silicon Motion, Inc.

Inventor： Yi-Kang Chang

IPC: G06F12/02 ,  G06F12/10 ,  G06F12/1009

Abstract: A flash memory control technology with high efficiency, which records a logical page table in a random access memory. The logical pages that have been collected from a data-interspersed block into a destination block of a flash memory are recorded in the logical page table. Without accessing a logical-to-physical address mapping table stored in the flash memory, the physical pages in the data-interspersed block corresponding to the logical pages recorded in the logical page table are regarded as containing invalid data.

公开(公告)号：US09569126B2

公开(公告)日：2017-02-14

申请号：US14802515

申请日：2015-07-17

Applicant: Silicon Motion, Inc.

Inventor： Yi-Kang Chang

IPC: G06F12/00 ,  G06F3/06

CPC classification number: G06F3/0619 ,  G06F3/064 ,  G06F3/0656 ,  G06F3/0679

Abstract: A flash memory control technology with power recovery capability, by which command sequence information is generated for write data that is requested to be written into a flash memory. A random access memory is allocated for temporary storage of the write data and the command sequence information. The write data is uploaded from the random access memory onto a run-time write block between physical blocks of the flash memory with the command sequence information corresponding thereto. During a power recovery process of a data storage device that is equipped with the flash memory, the run-time write block is checked and, according to the command sequence information that has been uploaded onto the run-time write block, the write data in the run-time write block and later in a command sequence than lost data is abandoned.

Abstract translation: 具有电源恢复能力的闪速存储器控制技术，通过该闪存控制技术为要求写入闪速存储器的写入数据生成命令序列信息。 分配随机存取存储器用于写入数据和命令序列信息的临时存储。 将写入数据从随机存取存储器上传到闪速存储器的物理块之间的运行时写入块与与之对应的命令序列信息。 在配备有闪速存储器的数据存储装置的电源恢复处理期间，检查运行时写入块，并且根据已经上传到运行时写入块的命令序列信息，写入数据 运行时写入块和以后在命令序列中比丢失的数据被放弃。