PARAMETERIZED INTERLEAVER FOR A MULTI-RATE SYSTEM
    1.
    发明申请
    PARAMETERIZED INTERLEAVER FOR A MULTI-RATE SYSTEM 审中-公开
    多速率系统的参数交互器

    公开(公告)号:US20150058704A1

    公开(公告)日:2015-02-26

    申请号:US14467884

    申请日:2014-08-25

    CPC classification number: H03M13/2732 H03M13/2789

    Abstract: A parameterized interleaver structure is presented. The interleaver is designed to specify and maintain a maximum delay, irrespective of code rate and number of code blocks. The disclosed interleaver in effect concatenates two interleaver structures together. When the arm index is greater than a defined number N1, the arm delay is calculated using a set of parameters M2, D2, and N, where M2 is a maximum delay for an interleaver arm, D2 is the delay decrement, and N is the arm index, running from 1 to N, where N is the total number of arms in the interleaver. However, when the arm index N is less than or equal to N1, the delay can be calculated in a similar manner, but using a second set of parameters, namely M1, D1, and N instead, which involves a different delay length. This approach has the dual benefit of specifying both the maximum delay of the interleaver and the minimum required delay to process data.

    Abstract translation: 提出了参数化交织器结构。 交织器被设计为指定和维持最大延迟,而不考虑码率和码块数。 所公开的交织器实际上将两个交织器结构连接在一起。 当臂指数大于定义数量N1时,使用一组参数M2,D2和N计算臂延迟,其中M2是交织器臂的最大延迟,D2是延迟减量,N是 臂指数,从1到N,其中N是交织器中的总臂数。 然而,当臂索引N小于或等于N1时,可以以类似的方式计算延迟,而是使用第二组参数,即M1,D1和N,这涉及不同的延迟长度。 该方法具有指定交织器的最大延迟和处理数据所需的最小延迟的双重优点。

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