公开(公告)号：US20140346639A1

公开(公告)日：2014-11-27

申请号：US14372659

申请日：2013-01-14

Applicant: Soitec

Inventor： Francois Boedt ,  Roland Brun ,  Olivier Ledoux ,  Eric Butaud

IPC: H01L21/762 ,  H01L29/36 ,  H01L21/66

CPC classification number: H01L21/76254 ,  H01L22/12 ,  H01L22/20 ,  H01L29/36

Abstract: The invention relates to a process for manufacturing a semiconductor substrate, characterized in that it comprises providing at least one donor semiconductor substrate comprising at least one useful silicon layer; inspecting the donor substrate via an inspecting machine in order to detect whether the useful layer contains emerging cavities of a size larger than or equal to a critical size, said critical size being strictly smaller than 44 nm; and manufacturing a semiconductor substrate comprising at least part of the useful layer of the donor substrate if, considering cavities of a size larger than or equal to the critical size, the density or number of cavities in the useful layer of the donor substrate is lower than or equal to a critical defect density or number.

Abstract translation: 本发明涉及一种用于制造半导体衬底的方法，其特征在于，其包括提供包括至少一个有用硅层的至少一个施主半导体衬底; 通过检查机检查供体基板，以便检测有用层是否包含尺寸大于或等于临界尺寸的新出现的空腔，所述临界尺寸严格小于44nm; 以及制造包括供体衬底的有用层的至少一部分的半导体衬底，如果考虑尺寸大于或等于临界尺寸的空腔，则供体衬底的有用层中的空腔的密度或数量低于 或等于临界缺陷密度或数量。

公开(公告)号：US09911641B2

公开(公告)日：2018-03-06

申请号：US14372659

申请日：2013-01-14

Applicant: Soitec

Inventor： Francois Boedt ,  Roland Brun ,  Olivier Ledoux ,  Eric Butaud

IPC: H01L21/762 ,  H01L21/66 ,  H01L29/36

CPC classification number: H01L21/76254 ,  H01L22/12 ,  H01L22/20 ,  H01L29/36

Abstract: The invention relates to a process for manufacturing a semiconductor substrate, characterized in that it comprises providing at least one donor semiconductor substrate comprising at least one useful silicon layer; inspecting the donor substrate via an inspecting machine in order to detect whether the useful layer contains emerging cavities of a size larger than or equal to a critical size, said critical size being strictly smaller than 44 nm; and manufacturing a semiconductor substrate comprising at least part of the useful layer of the donor substrate if, considering cavities of a size larger than or equal to the critical size, the density or number of cavities in the useful layer of the donor substrate is lower than or equal to a critical defect density or number.