公开(公告)号：US08306103B2

公开(公告)日：2012-11-06

申请号：US12632624

申请日：2009-12-07

申请人： Oliver Skull ,  Stephane Laurent-Michel ,  Alan Doak

发明人： Oliver Skull ,  Stephane Laurent-Michel ,  Alan Doak

IPC分类号： H03H7/30 ,  H04B1/10

CPC分类号： H04L27/01 ,  H04L25/061 ,  H04L27/3863 ,  H04N5/455 ,  H04N5/46

摘要： Systems and methods which provide a multimode tuner architecture implementing direct frequency conversion are shown. Embodiments provide a highly integrated configuration wherein low noise amplifier, tuner, analog and digital channel filter, and analog demodulator functionality are provided in a single integrated circuit. A LNA of embodiments implements a multi-path configuration with seamless switching to provide desired gain control while meeting noise and linearity design parameters. Embodiments of the invention implement in-phase and quadrature (IQ) equalization and a multimode channelization filter architecture to facilitate the use of direct frequency conversion. Embodiments implement spur avoidance techniques for improving tuner system operation and output using a clock signal generation architecture in which a system clock, sampling clock frequencies, local oscillator (LO) reference clock frequencies, and/or the like are dynamically movable.

摘要翻译： 示出了提供实现直接频率转换的多模调谐器架构的系统和方法。 实施例提供高度集成的配置，其中在单个集成电路中提供低噪声放大器，调谐器，模拟和数字信道滤波器以及模拟解调器功能。 实施例的LNA实现具有无缝切换的多路径配置，以在满足噪声和线性设计参数的同时提供期望的增益控制。 本发明的实施例实现了同相和正交（IQ）均衡和多模信道化滤波器架构，以便于直接频率转换的使用。 实施例实现了使用其中系统时钟，采样时钟频率，本地振荡器（LO）参考时钟频率等等是可动态移动的时钟信号生成架构来改进调谐器系统操作和输出的杂散避免技术。

公开(公告)号：US20110134335A1

公开(公告)日：2011-06-09

申请号：US12632634

申请日：2009-12-07

申请人： Stephane Laurent-Michel ,  Oliver Skull ,  Alan Doak

发明人： Stephane Laurent-Michel ,  Oliver Skull ,  Alan Doak

IPC分类号： H04N5/50

CPC分类号： H04N5/455 ,  H04B1/001 ,  H04N5/46 ,  H04N21/42638 ,  H04N21/4382 ,  H04N21/6112

摘要： Systems and methods which provide a multimode tuner architecture implementing direct frequency conversion are shown. Embodiments provide a highly integrated configuration wherein low noise amplifier, tuner, analog and digital channel filter, and analog demodulator functionality are provided in a single integrated circuit. A LNA of embodiments implements a multi-path configuration with seamless switching to provide desired gain control while meeting noise and linearity design parameters. Embodiments of the invention implement in-phase and quadrature (IQ) equalization and a multimode channelization filter architecture to facilitate the use of direct frequency conversion. Embodiments implement spur avoidance techniques for improving tuner system operation and output using a clock signal generation architecture in which a system clock, sampling clock frequencies, local oscillator (LO) reference clock frequencies, and/or the like are dynamically movable.

摘要翻译： 示出了提供实现直接频率转换的多模调谐器架构的系统和方法。 实施例提供高度集成的配置，其中在单个集成电路中提供低噪声放大器，调谐器，模拟和数字信道滤波器以及模拟解调器功能。 实施例的LNA实现具有无缝切换的多路径配置，以在满足噪声和线性设计参数的同时提供期望的增益控制。 本发明的实施例实现了同相和正交（IQ）均衡和多模信道化滤波器架构，以便于直接频率转换的使用。 实施例实现了使用其中系统时钟，采样时钟频率，本地振荡器（LO）参考时钟频率等等是可动态移动的时钟信号生成架构来改进调谐器系统操作和输出的杂散避免技术。

公开(公告)号：US08416899B2

公开(公告)日：2013-04-09

申请号：US12632634

申请日：2009-12-07

申请人： Stephane Laurent-Michel ,  Oliver Skull ,  Alan Doak

发明人： Stephane Laurent-Michel ,  Oliver Skull ,  Alan Doak

IPC分类号： H04B1/10

CPC分类号： H04N5/455 ,  H04B1/001 ,  H04N5/46 ,  H04N21/42638 ,  H04N21/4382 ,  H04N21/6112

摘要： Systems and methods which provide a multimode tuner architecture implementing direct frequency conversion are shown. Embodiments provide a highly integrated configuration wherein low noise amplifier, tuner, analog and digital channel filter, and analog demodulator functionality are provided in a single integrated circuit. A LNA of embodiments implements a multi-path configuration with seamless switching to provide desired gain control while meeting noise and linearity design parameters. Embodiments of the invention implement in-phase and quadrature (IQ) equalization and a multimode channelization filter architecture to facilitate the use of direct frequency conversion. Embodiments implement spur avoidance techniques for improving tuner system operation and output using a clock signal generation architecture in which a system clock, sampling clock frequencies, local oscillator (LO) reference clock frequencies, and/or the like are dynamically movable.

摘要翻译： 示出了提供实现直接频率转换的多模调谐器架构的系统和方法。 实施例提供高度集成的配置，其中在单个集成电路中提供低噪声放大器，调谐器，模拟和数字信道滤波器以及模拟解调器功能。 实施例的LNA实现具有无缝切换的多路径配置，以在满足噪声和线性设计参数的同时提供期望的增益控制。 本发明的实施例实现了同相和正交（IQ）均衡和多模信道化滤波器架构，以便于直接频率转换的使用。 实施例实现了使用其中系统时钟，采样时钟频率，本地振荡器（LO）参考时钟频率等等是可动态移动的时钟信号生成架构来改进调谐器系统操作和输出的杂散避免技术。

公开(公告)号：US20110134986A1

公开(公告)日：2011-06-09

申请号：US12632624

申请日：2009-12-07

申请人： Oliver Skull ,  Stephane Laurent-Michel ,  Alan Doak

发明人： Oliver Skull ,  Stephane Laurent-Michel ,  Alan Doak

IPC分类号： H04L27/01 ,  H04L25/06

CPC分类号： H04L27/01 ,  H04L25/061 ,  H04L27/3863 ,  H04N5/455 ,  H04N5/46

摘要： Systems and methods which provide a multimode tuner architecture implementing direct frequency conversion are shown. Embodiments provide a highly integrated configuration wherein low noise amplifier, tuner, analog and digital channel filter, and analog demodulator functionality are provided in a single integrated circuit. A LNA of embodiments implements a multi-path configuration with seamless switching to provide desired gain control while meeting noise and linearity design parameters. Embodiments of the invention implement in-phase and quadrature (IQ) equalization and a multimode channelization filter architecture to facilitate the use of direct frequency conversion. Embodiments implement spur avoidance techniques for improving tuner system operation and output using a clock signal generation architecture in which a system clock, sampling clock frequencies, local oscillator (LO) reference clock frequencies, and/or the like are dynamically movable.

摘要翻译： 示出了提供实现直接频率转换的多模调谐器架构的系统和方法。 实施例提供高度集成的配置，其中在单个集成电路中提供低噪声放大器，调谐器，模拟和数字信道滤波器以及模拟解调器功能。 实施例的LNA实现具有无缝切换的多路径配置，以在满足噪声和线性设计参数的同时提供期望的增益控制。 本发明的实施例实现了同相和正交（IQ）均衡和多模信道化滤波器架构，以便于直接频率转换的使用。 实施例实现了使用其中系统时钟，采样时钟频率，本地振荡器（LO）参考时钟频率等等是可动态移动的时钟信号生成架构来改进调谐器系统操作和输出的杂散避免技术。