METHOD AND APPARATUS FOR DETECTING A PLURALITY OF SYMBOL BLOCKS USING A DECODER
    1.
    发明申请
    METHOD AND APPARATUS FOR DETECTING A PLURALITY OF SYMBOL BLOCKS USING A DECODER 有权
    使用解码器检测符号块的多样性的方法和装置

    公开(公告)号:US20120321022A1

    公开(公告)日:2012-12-20

    申请号:US13594191

    申请日:2012-08-24

    IPC分类号: H04L27/06

    摘要: Teachings presented herein offer a technique for using a demodulator to improve a demodulation process. For example, a demodulation unit according to an embodiment of the present invention may be a multi-stage demodulator and may include: a demodulator configured to receive a baseband signal and configured to produce modem bit likelihood values based on the received baseband signal; a decoder configured to receive and process the modem bit likelihood values to produce improved modem bit likelihood values; a candidate value generator configured to produce, based on the improved modem bit likelihood values, candidate symbol values for a group of one or more symbols; and a detector configured to receive the baseband signal and the candidate symbol values and configured to produce one of (a) final modem bit estimates and (b) candidate symbol values for a group of symbols.

    摘要翻译: 本文提出的教学提供了一种使用解调器来改进解调过程的技术。 例如,根据本发明的实施例的解调单元可以是多级解调器,并且可以包括:解调器,被配置为接收基带信号并被配置为基于接收到的基带信号产生调制解调器比特似然值; 解码器,被配置为接收和处理调制解调器比特似然值以产生改进的调制解调器比特似然值; 候选值生成器,被配置为基于改进的调制解调器比特似然值产生一个或多个符号的组的候选符号值; 以及检测器,被配置为接收基带信号和候选符号值,并且被配置为产生(a)最终调制解调器比特估计和(b)一组符号的候选符号值中的一个。

    Method and apparatus for detecting a plurality of symbol blocks using a decoder
    2.
    发明授权
    Method and apparatus for detecting a plurality of symbol blocks using a decoder 有权
    用于使用解码器检测多个符号块的方法和装置

    公开(公告)号:US08290091B2

    公开(公告)日:2012-10-16

    申请号:US12628360

    申请日:2009-12-01

    IPC分类号: H04L27/06 H04L27/14

    摘要: Teachings presented herein offer a technique for using a demodulator to improve a demodulation process. For example, a demodulation unit according to an embodiment of the present invention may be a multi-stage demodulator and may include: a demodulator configured to receive a baseband signal and configured to produce modem bit likelihood values based on the received baseband signal; a decoder configured to receive and process the modem bit likelihood values to produce improved modem bit likelihood values; a candidate value generator configured to produce, based on the improved modem bit likelihood values, candidate symbol values for a group of one or more symbols; and a detector configured to receive the baseband signal and the candidate symbol values and configured to produce one of (a) final modem bit estimates and (b) candidate symbol values for a group of symbols.

    摘要翻译: 本文提出的教学提供了一种使用解调器来改进解调过程的技术。 例如,根据本发明的实施例的解调单元可以是多级解调器,并且可以包括:解调器,被配置为接收基带信号并被配置为基于接收到的基带信号产生调制解调器比特似然值; 解码器,被配置为接收和处理调制解调器比特似然值以产生改进的调制解调器比特似然值; 候选值生成器,被配置为基于改进的调制解调器比特似然值产生一个或多个符号的组的候选符号值; 以及检测器,被配置为接收基带信号和候选符号值,并且被配置为产生(a)最终调制解调器比特估计和(b)一组符号的候选符号值中的一个。

    METHOD AND APPARATUS FOR DETECTING A PLURALITY OF SYMBOL BLOCKS USING A DECODER
    3.
    发明申请
    METHOD AND APPARATUS FOR DETECTING A PLURALITY OF SYMBOL BLOCKS USING A DECODER 有权
    用于使用解码器检测多个符号块的方法和装置

    公开(公告)号:US20110129042A1

    公开(公告)日:2011-06-02

    申请号:US12628360

    申请日:2009-12-01

    IPC分类号: H04L27/06

    摘要: Teachings presented herein offer a technique for using a demodulator to improve a demodulation process. For example, a demodulation unit according to an embodiment of the present invention may be a multi-stage demodulator and may include: a demodulator configured to receive a baseband signal and configured to produce modem bit likelihood values based on the received baseband signal; a decoder configured to receive and process the modem bit likelihood values to produce improved modem bit likelihood values; a candidate value generator configured to produce, based on the improved modem bit likelihood values, candidate symbol values for a group of one or more symbols; and a detector configured to receive the baseband signal and the candidate symbol values and configured to produce one of (a) final modem bit estimates and (b) candidate symbol values for a group of symbols.

    摘要翻译: 本文提出的教学提供了一种使用解调器来改进解调过程的技术。 例如,根据本发明的实施例的解调单元可以是多级解调器,并且可以包括:解调器,被配置为接收基带信号并被配置为基于接收到的基带信号产生调制解调器比特似然值; 解码器,被配置为接收和处理调制解调器比特似然值以产生改进的调制解调器比特似然值; 候选值生成器,被配置为基于改进的调制解调器比特似然值产生一个或多个符号的组的候选符号值; 以及检测器,被配置为接收基带信号和候选符号值,并且被配置为产生(a)最终调制解调器比特估计和(b)一组符号的候选符号值中的一个。

    Method and apparatus for detecting a plurality of symbol blocks using a decoder
    4.
    发明授权
    Method and apparatus for detecting a plurality of symbol blocks using a decoder 有权
    用于使用解码器检测多个符号块的方法和装置

    公开(公告)号:US08630372B2

    公开(公告)日:2014-01-14

    申请号:US13594191

    申请日:2012-08-24

    IPC分类号: H04L27/06 H04L27/14

    摘要: Teachings presented herein offer a technique for using a demodulator to improve a demodulation process. For example, a demodulation unit according to an embodiment of the present invention may be a multi-stage demodulator and may include: a demodulator configured to receive a baseband signal and configured to produce modem bit likelihood values based on the received baseband signal; a decoder configured to receive and process the modem bit likelihood values to produce improved modem bit likelihood values; a candidate value generator configured to produce, based on the improved modem bit likelihood values, candidate symbol values for a group of one or more symbols; and a detector configured to receive the baseband signal and the candidate symbol values and configured to produce one of (a) final modem bit estimates and (b) candidate symbol values for a group of symbols.

    摘要翻译: 本文提出的教学提供了一种使用解调器来改进解调过程的技术。 例如,根据本发明的实施例的解调单元可以是多级解调器,并且可以包括:解调器,被配置为接收基带信号并被配置为基于接收到的基带信号产生调制解调器比特似然值; 解码器,被配置为接收和处理调制解调器比特似然值以产生改进的调制解调器比特似然值; 候选值生成器,被配置为基于改进的调制解调器比特似然值产生一个或多个符号的组的候选符号值; 以及检测器,被配置为接收基带信号和候选符号值,并且被配置为产生(a)最终调制解调器比特估计和(b)一组符号的候选符号值中的一个。