公开(公告)号：US07802077B1

公开(公告)日：2010-09-21

申请号：US09608624

申请日：2000-06-30

申请人： Stephen J. Jourdan ,  Lihu Rappoport ,  Ronny Ronen ,  Adi Yoaz

发明人： Stephen J. Jourdan ,  Lihu Rappoport ,  Ronny Ronen ,  Adi Yoaz

IPC分类号： G06F9/30 ,  G06F9/40 ,  G06F15/00

CPC分类号： G06F9/3808

摘要： A new class traces for a processing engine, called “extended blocks,” possess an architecture that permits possible many entry points but only a single exit point. These extended blocks may be indexed based upon the address of the last instruction therein. Use of the new trace architecture provides several advantages, including reduction of instruction redundancies, dynamic block extension and a sharing of instructions among various extended blocks.

摘要翻译： 一个称为“扩展块”的处理引擎的新类跟踪具有允许许多入口点但只有单个退出点的架构。 这些扩展块可以根据其中最后一条指令的地址进行索引。 使用新的跟踪架构提供了几个优点，包括减少指令冗余，动态块扩展和各种扩展块之间的指令共享。

公开(公告)号：US07051190B2

公开(公告)日：2006-05-23

申请号：US10180387

申请日：2002-06-25

申请人： Nicholas G. Samra ,  Stephen J. Jourdan

发明人： Nicholas G. Samra ,  Stephen J. Jourdan

IPC分类号： G06F9/12

CPC分类号： G06F9/3017 ,  G06F9/3853

摘要： Fusing micro-operations (uops) together. Intra-instruction fusing can increase cache memory storage efficiency and computer instruction processing bandwidth within a microprocessor without incurring significant computer system cost. Uops are fused, stored in cache memory, un-fused, executed in parallel, and retired in order to optimize cost and performance.