Method and apparatus for switching ATM, TDM, and packet data through a single communications switch while maintaining TDM timing
    2.
    发明授权
    Method and apparatus for switching ATM, TDM, and packet data through a single communications switch while maintaining TDM timing 有权
    用于在保持TDM定时的同时通过单个通信交换机切换ATM,TDM和分组数据的方法和装置

    公开(公告)号:US06631130B1

    公开(公告)日:2003-10-07

    申请号:US09717440

    申请日:2000-11-21

    IPC分类号: H04L1266

    摘要: A network switch includes at least one port processor and at least one switch element. The port processor has an SONET OC-x interface (for TDM traffic), a UTOPIA interface (for ATM and packet traffic), and an interface to the switch element. In one embodiment, the port processor has a total I/O bandwidth equivalent to an OC-48, and the switch element has 12×12 ports for a total bandwidth of 30 Gbps. A typical switch includes multiple port processors and switch elements. A data frame of 9 rows by 1700 slots is used to transport ATM, TDM, and Packet data from a port processor through one or more switch elements to the same or another port processor. Each frame is transmitted in 125 microseconds; each row in 13.89 microseconds. Each slot includes a 4-bit tag plus a 4-byte payload. The slot bandwidth is 2.592 Mbps which is large enough to carry an E-1 signal with overhead. The 4-bit tag is a cross connect pointer which is setup when a TDM connection is provisioned. The last twenty slots of the frame are reserved for link overhead. Thus, the frame is capable of carrying the equivalent of 1,680 E-1 TDM signals. For ATM and packet data, a PDU (protocol data unit) of 16 slots is defined for a 64-byte payload. The PDUs are self-routed through the switch with a 28-bit routing tag which allows routing through seven switch stages using 4-bits per stage. Bandwidth is arbitrated among ATM and Packet connections while maintaining TDM timing.

    摘要翻译: 网络交换机包括至少一个端口处理器和至少一个开关元件。 端口处理器具有SONET OC-x接口(用于TDM流量),UTOPIA接口(用于ATM和数据包流量)以及与交换机元件的接口。 在一个实施例中,端口处理器具有等同于OC-48的总I / O带宽,并且交换单元具有12×12端口,总带宽为30Gbps。 典型的交换机包括多个端口处理器和交换机元件。 使用9行×1700个时隙的数据帧将ATM,TDM和分组数据从端口处理器通过一个或多个交换元件传输到相同或另一个端口处理器。 每帧在125微秒内传输; 每行在13.89微秒。 每个插槽包括一个4位标签加上一个4字节的有效载荷。 时隙带宽为2.592Mbps,足够大以承载具有开销的E-1信号。 4位标签是交叉连接指针,当指定TDM连接时,该指针将被设置。 帧的最后20个时隙被保留用于链路开销。 因此,该帧能够承载1,680个E-1 TDM信号的等效物。 对于ATM和分组数据,为64字节的有效载荷定义了16个时隙的PDU(协议数据单元)。 PDU通过具有28位路由标签的交换机进行自路由,该路由标签允许通过每个阶段使用4位的七个交换阶段进行路由。 在保持TDM定时的同时,在ATM和分组连接之间仲裁带宽。

    Phase and frequency drift and jitter compensation in a distributed telecommunications switch
    3.
    发明授权
    Phase and frequency drift and jitter compensation in a distributed telecommunications switch 有权
    分布式电信交换机中的相位和频率漂移和抖动补偿

    公开(公告)号:US07463626B2

    公开(公告)日:2008-12-09

    申请号:US10155517

    申请日:2002-05-24

    IPC分类号: H04L12/56

    摘要: Methods and apparatus for phase and frequency drift and jitter compensation in a distributed switch which carries both TDM and packet data are disclosed. The methods include the insertion of programmable fill times at different stages of the switch to allow buffers to fill, driving service processors (line cards) with different clocks and synchronizing the service processors (line cards) to the switch fabric, providing redundant switch fabric clocks and methods for automatically substituting one of the redundant clocks for a clock which fails, providing redundant switch fabrics each having a different clock and methods for automatically substituting one switch fabric for the other when one fails. The apparatus of the invention includes a plurality of service processors (line cards), switch elements and clock generators. An exemplary clock generator based on an FPGA is also disclosed.

    摘要翻译: 公开了携带TDM和分组数据的分布式交换机中的相位和频率漂移和抖动补偿的方法和装置。 这些方法包括在开关的不同阶段插入可编程的填充时间,以允许缓冲区填充,以不同的时钟驱动服务处理器(线路卡),并将服务处理器(线路卡)同步到交换结构,提供冗余的交换矩阵时钟 以及用于自动地将一个冗余时钟替换为失败的时钟的方法,提供每个具有不同时钟的冗余交换结构和用于当一个交换结构失败时自动替换另一个交换结构的方法。 本发明的装置包括多个服务处理器(线路卡),开关元件和时钟发生器。 还公开了一种基于FPGA的示例性时钟发生器。