公开(公告)号：US20230065056A1

公开(公告)日：2023-03-02

申请号：US17460833

申请日：2021-08-30

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Hsiao-Chien LIN ,  Hsi Chung CHEN ,  Cheng-Hung TSAI ,  Chih-Hsuan LIN

IPC: H01L29/417 ,  H01L29/66 ,  H01L29/40

Abstract: A method includes forming a dummy gate structure across a fin, in which the dummy gate structure has a dummy gate dielectric layer and a dummy gate electrode, forming gate spacers on sidewalls of the dummy gate structure, forming source/drain epitaxial structures on sides of the dummy gate structure, performing a first etch process to the dummy gate electrode such that a recessed dummy gate electrode remains over the fin, performing a second etch process to the gate spacers such that recessed gate spacers remain over the sidewalls of the dummy gate structure, removing the recessed dummy gate electrode and the dummy gate dielectric layer after the second etch process to form a recess between the recessed gate spacers, forming a gate structure overfilling the recess, and performing a third etch process to the gate structure such that a recessed gate structure remains between the recessed gate spacers.

公开(公告)号：US20220384426A1

公开(公告)日：2022-12-01

申请号：US17819245

申请日：2022-08-11

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Cheng-Hung TSAI ,  Xi-Zong CHEN ,  Hsiao Chien LIN ,  Chia-Tsung TSO ,  Chih-Teng LIAO

IPC: H01L27/06 ,  H01L49/02

Abstract: A semiconductor device having source and drain regions in a semiconductor substrate, a transistor including a gate electrode over the semiconductor substrate, an isolation structure in the semiconductor substrate adjacent to the transistor, a first inter-dielectric layer (ILD) material over the isolation structure, and a capacitor film stack over the first ILD material that includes an isolation plate over and covering a capacitor plate, and a contact to the capacitor plate.

公开(公告)号：US20220115370A1

公开(公告)日：2022-04-14

申请号：US17069365

申请日：2020-10-13

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Cheng-Hung TSAI ,  Xi-Zong CHEN ,  Hsiao Chien LIN ,  Chia-Tsung TSO ,  Chih-Teng LIAO

IPC: H01L27/06 ,  H01L49/02

Abstract: A method of making a semiconductor device includes steps related to forming source and drain wells of a transistor in a semiconductor substrate; forming a gate electrode of the transistor over the semiconductor substrate; forming an isolation structure in the semiconductor substrate adjacent to the transistor; and depositing a first inter-dielectric layer (ILD) material over the transistor and the isolation structure. The method also includes steps for depositing a capacitor film stack over the first ILD material, forming a pattern in the capacitor film stack over the isolation structure, and forming a capacitor plate by etching a conductive material of the capacitor film stack. Etching the conductive material includes performing a liquid etch process with a selectivity of at least 16 with regard to other materials in the capacitor film stack.