公开(公告)号：US20230326680A1

公开(公告)日：2023-10-12

申请号：US18327805

申请日：2023-06-01

Applicant: TAIYO YUDEN CO., LTD.

Inventor： Kazuki YAMADA ,  Kotaro MIZUNO ,  Yoichi KATO ,  Hidetoshi MASUDA

IPC: H01G4/30 ,  H01G4/008 ,  H01G4/12 ,  C04B35/468 ,  H01G4/012

CPC classification number: H01G4/30 ,  H01G4/008 ,  H01G4/1218 ,  C04B35/4682 ,  H01G4/012 ,  C04B2235/65

Abstract: A manufacturing method of a multilayer ceramic electronic device includes: forming each of stack units by forming each of internal electrode patterns on each of dielectric green sheets, the each of internal electrode patterns including Ni, Sn and Au; forming a multilayer structure by stacking the each of stack units; and firing the multilayer structure, whereby each internal electrode layer is formed from the each of internal electrode patterns and each dielectric layer is formed from the each of the dielectric green sheets wherein, in the each internal electrode layer, an Au concentration near each interface between the each internal electrode layer and the each dielectric layer is larger than an Au concentration in each center portion in a thickness direction.

公开(公告)号：US20220139630A1

公开(公告)日：2022-05-05

申请号：US17372401

申请日：2021-07-09

Applicant: TAIYO YUDEN CO., LTD.

Inventor： Kazuki YAMADA ,  Kotaro MIZUNO ,  Yoichi KATO ,  Hidetoshi MASUDA

IPC: H01G4/30 ,  H01G4/008 ,  H01G4/012 ,  H01G4/12 ,  C04B35/468

Abstract: A ceramic electronic device includes a multilayer chip in which a plurality of dielectric layers of which a main component is ceramic and a plurality of internal electrode layers are stacked. The plurality of internal electrode layers include Ni, Sn and Au.