公开(公告)号：US11854461B2

公开(公告)日：2023-12-26

申请号：US17050847

申请日：2020-04-14

Applicant: TCL CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.

Inventor： Jing Zhu

IPC: G09G3/20

CPC classification number: G09G3/2096 ,  G09G2310/0267 ,  G09G2330/04

Abstract: The present application discloses a GOA circuit and a display panel. High-temperature durability of a first node is improved not only by adding a thirteenth transistor to a pull-down remaining module to lower a voltage difference between a source and a drain of the an eleventh transistor to suppress electric leakage of the first node, but also by adding a twentieth transistor to the pull-down remaining module to lower a voltage difference between a gate and a source of a nineteenth transistor to suppress electric leakage of the first node.

公开(公告)号：US11610532B2

公开(公告)日：2023-03-21

申请号：US16757784

申请日：2020-04-07

Applicant: TCL CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.

Inventor： Jing Zhu

IPC: G09G3/20 ,  G02F1/1362 ,  G02F1/1343

Abstract: The present invention provides a display panel and a display device. The display panel comprises a first substrate, a driving circuit layer, a first common electrode layer, and at least one scanning signal transmission line located between two adjacent data lines and arranged in parallel with the data lines. The scanning signal transmission line and the driving circuit layer are arranged in a same layer. The present invention reduces widths of frames and increases display aperture ratio by directing the scanning signal transmission line to a bottom edge of the display panel and setting the scanning signal transmission line in pixel units.

公开(公告)号：US11361725B2

公开(公告)日：2022-06-14

申请号：US16757504

申请日：2020-03-13

Applicant: TCL CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.

Inventor： Jing Zhu

IPC: G09G3/36

Abstract: A GOA circuit is provided and includes a plurality of GOA sub circuits which are cascaded. An Nth GOA sub circuit of the GOA sub circuits includes: a cascade control unit configured to generate a first drive signal according to an (N−3)th scan signal and an (N−3)th cascade signal; a cascade signal generation unit connected to the cascade control unit; a first scan drive unit connected to the cascade control unit and a first low voltage level signal; and a second scan drive unit connected to the cascade control unit and the first low voltage level signal.

公开(公告)号：US20210366336A1

公开(公告)日：2021-11-25

申请号：US16617081

申请日：2019-09-23

Applicant: TCL China Star Optoelectronics Technology Co., Ltd.

Inventor： Jing Zhu

IPC: G09G3/20

Abstract: A gate driver on array (GOA) display panel is provided, including a display area, a bezel area, a plurality of pixel units, and a GOA circuit. The plurality of pixel units are disposed in the display area in an array. The GOA circuit includes a GOA unit group and a trace group. The GOA unit group is disposed in the display area. The trace group is electrically connected to the GOA unit group and is disposed in the bezel area. The trace group includes a GOA bus and a common electrode line. A super narrow bezel design is achieved by arranging the cascaded GOA unit group of the GOA circuit within the display area.

公开(公告)号：US11295687B2

公开(公告)日：2022-04-05

申请号：US16626334

申请日：2019-12-10

Applicant: TCL CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.

Inventor： Jing Zhu

IPC: G09G3/36

Abstract: A GOA device and a gate driving circuit are provided. A pull-up control unit and a bootstrap unit sequentially control a control node of an Nth stage GOA unit to be pulled up to a first high voltage level and a second high voltage level. A pull-up unit outputs a gate driving signal according to a change of a voltage level of the control node and a stage transfer signal of the Nth stage GOA unit. As such, a pulse width of the gate driving signal is increased, and the problem that the charging ability is not sufficient can be solved.

公开(公告)号：US11308834B2

公开(公告)日：2022-04-19

申请号：US16617081

申请日：2019-09-23

Applicant: TCL China Star Optoelectronics Technology Co., Ltd.

Inventor： Jing Zhu

IPC: G02F1/1343 ,  G09G3/20

Abstract: A gate driver on array (GOA) display panel is provided, including a display area, a bezel area, a plurality of pixel units, and a GOA circuit. The plurality of pixel units are disposed in the display area in an array. The GOA circuit includes a GOA unit group and a trace group. The GOA unit group is disposed in the display area. The trace group is electrically connected to the GOA unit group and is disposed in the bezel area. The trace group includes a GOA bus and a common electrode line. A super narrow bezel design is achieved by arranging the cascaded GOA unit group of the GOA circuit within the display area.