-
公开(公告)号:US20210327921A1
公开(公告)日:2021-10-21
申请号:US16627291
申请日:2019-12-12
Inventor: Peipei XU
IPC: H01L27/12
Abstract: An array substrate of the present invention includes: a first metal layer; an insulating layer on the first metal layer; an amorphous silicon layer on a surface of the insulating layer away from the first metal layer; an amorphous silicon doped layer arranged on a surface of the amorphous silicon layer away from the insulating layer; a second metal layer including a first portion and a second portion, the first portion arranged on a surface of the amorphous silicon doped layer away from the amorphous silicon layer, a second portion arranged on the first surface and in contact with the first metal layer; a protective layer arranged on the first metal layer and the second metal layer; a first transparent electrode connected to the first metal layer through the protective layer; and a second transparent electrode connected to the second metal layer through the protective layer.
-
公开(公告)号:US20210358962A1
公开(公告)日:2021-11-18
申请号:US16627816
申请日:2019-12-27
Inventor: Peipei XU
IPC: H01L27/12
Abstract: An array substrate, a display panel and a method for manufacturing the array substrate are provided. The array substrate further includes a first via and a second via. A conductive layer fills the first via and the second via to electrically connect the first metal layer and the second metal layer. The first via is disposed on a side of the second via, and a passivation layer partially extends between the first via and the second via. The display panel includes the above-mentioned array substrate.
-