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公开(公告)号：US20220415242A1
公开(公告)日：2022-12-29
申请号：US16625689
申请日：2019-12-10
Inventor： Xiaoli FU
IPC: G09G3/20
Abstract: A driving circuit that includes a timing controller, a selecting module connected to the timing controller, and a level shifter connected to the selecting module, wherein the timing controller includes N pins, each of the pins provides a clock signal, and N is a positive integer; the selecting module includes N selecting units, an input terminal of each of the selecting units is connected to a corresponding pin of the timing controller, output terminals of each of the selecting units are connected to M input pins of the level shifter, and M is greater than or equal to 2. The driving circuit according to the present invention individually passes clock signals of a timing controller through selecting units and outputs to a level shifter, and pins of the timing controller can be substantially saved.
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Patent Agency Ranking
公开(公告)号：US20210366355A1
公开(公告)日：2021-11-25
申请号：US16622944
申请日：2019-12-11
Inventor： Xiaoli FU
IPC: G09G3/20
Abstract: The present invention provides a source driver. The source driver includes an output terminal. The output terminal includes multiple effective output terminals and multiple dummy terminals. The effective output terminals constitute multiple effective output terminal groups. The dummy terminals constitute multiple dummy terminal groups. The effective output terminal groups are spaced apart by the dummy terminal groups. In the source driver of the present invention, the source outputs are divided into groups by setting virtual terminals, so that an electro-magnetic interference (EMI) test can be passed, and waste can be avoided.
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公开(公告)号：US20210225752A1
公开(公告)日：2021-07-22
申请号：US16623800
申请日：2019-12-05
Inventor： Xiaoli FU
IPC: H01L23/498
Abstract: The present application provides a chip on film and a display device, the chip on film including a plurality of first source signal lines located at a middle, and a plurality of second source signal lines located at opposite sides, wherein each of the first source signal lines has a cross-sectional area smaller than a cross-sectional area of each of the second source signal lines in a reference plane. Based on the structure, attenuation from the source driver chip to each data lines is substantially the same or even completely the same.
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公开(公告)号：US20230120315A1
公开(公告)日：2023-04-20
申请号：US16960554
申请日：2020-04-24
Inventor： Xiaoli FU
IPC: G09G3/20
Abstract: In a display device, transistors are disposed on a display panel. When the display panel has a short-circuit, the timing controller sends a signal to the level shifter to disconnect the transistors, causing the display panel to no longer receive scanning signals transmitted from GOA circuits, causing the display panel enter an overcurrent protection state, and thus preventing GOA wirings in the display panel from burning out in an event of the short-circuit.
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公开(公告)号：US20220114929A1
公开(公告)日：2022-04-14
申请号：US16761248
申请日：2020-04-03
Inventor： Xiaoli FU
Abstract: A display device and an electronic device are provided. The display device is provided with a control unit between a driving chip and an electrostatic test point. During an electrostatic test, the control unit is disconnected from the driving chip to form a protection circuit for the driving chip under control of a first control signal and a second control signal, which can effectively prevent the driving chip from damage by static electricity.
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公开(公告)号：US20210209984A1
公开(公告)日：2021-07-08
申请号：US16623772
申请日：2019-11-21
Inventor： Xiaoli FU
IPC: G09G3/20
Abstract: The present disclosure provides a circuit for solving electromagnetic interference signal including a source driving chip, a plurality of first switching units, and a delay control unit. The source driving chip includes a plurality of the output passageway connected to a corresponding row of pixel electrodes in a glass substrate through the data lines and configured to output a charging signal in order to charge the pixel electrodes. The first switch units are correspondingly disposed on each output passageways and connected to the corresponding delay control unit to control the output passageways provided with the first switching units to output the charging signal at a predetermined delay time according to a delay control signal generated by the delay control unit. The connection between the delay control unit and the internal of the source driving chip can reduce manufacturing costs and electromagnetic interference of the display panel circuit.
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