-
公开(公告)号:US20210105034A1
公开(公告)日:2021-04-08
申请号:US17001157
申请日:2020-08-24
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: ASWATH VS , STHANUNATHAN RAMAKRISHNAN , SRIRAM MURALI , SARMA SUNDARESWARA GUNTURI , JAIGANESH BALAKRISHNAN , SASHIDHARAN VENKATRAMAN
Abstract: One example includes a receiver system. The receiver system includes an analog-to-digital converter (ADC) configured to convert an analog input signal into a digital output signal at a sampling frequency. The receiver system also includes a spur correction system configured to receive the digital output signal and to estimate spurs associated with the digital output signal and to selectively correct a subset of the spurs associated with a set of frequencies that are based on the sampling frequency.
-
公开(公告)号:US20210126644A1
公开(公告)日:2021-04-29
申请号:US17072225
申请日:2020-10-16
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: RAHUL SHARMA , ASWATH VS , SRIRAM MURALI , PRASAD GANDEWAR , SANDEEP KESRIMAL OSWAL
Abstract: Analog gain correction circuitry and analog switching clock edge timing correction circuitry can provide coarse correction of interleaving errors in radio-frequency digital-to-analog converters (RF DACs), such as may be used in 5G wireless base stations. The analog correction can be supplemented by digital circuitry configured to “pre-cancel” an interleaving image by adding to a digital DAC input signal a signal equal and opposite to an interleaving image created by the interleaving DAC, such that the interleaving image is effectively mitigated. Error correction control parameters can be periodically adjusted for changes in temperature by a controller coupled to an on-chip temperature sensor. A model useful for understanding the sources of error in interleaving DACs is also described.
-