公开(公告)号：US10902921B2

公开(公告)日：2021-01-26

申请号：US16230778

申请日：2018-12-21

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Xiang-Zheng Bo ,  Vijaya Subramaniam Vemuri ,  Corey Rollin O'Brien

IPC: G11C11/34 ,  G11C16/16 ,  H01L27/11517 ,  G11C16/04 ,  G11C16/30

Abstract: In some examples, a flash memory comprises a first gate and a second gate located over a semiconductor substrate a third gate located between the first gate and the second gate a floating gate located between the third gate and the semiconductor substrate; and a doped region located within the semiconductor substrate and proximate the second gate, wherein the doped region is configured to receive a positive bias voltage with respect to the semiconductor substrate during an erase cycle.