SINGLE-CLOCK DISPLAY DRIVER
    1.
    发明申请

    公开(公告)号:US20210233462A1

    公开(公告)日:2021-07-29

    申请号:US17139544

    申请日:2020-12-31

    Abstract: Aspects of the description provide for a circuit. In at least some examples, the circuit includes a driver. The driver includes a phase-locked loop and a digital interface. The phase-locked loop is configured to receive a clock signal and provide a second clock signal based on the first clock signal. The digital interface is configured to, receive the first clock signal, receive and sample data from a data frame at sequential rising edge transitions and falling edge transitions of the first clock signal, extract a portion of the data frame addressed to the driver from the data frame, and provide a portion of the data frame remaining after extracting the portion of the data frame addressed to the driver.

Patent Agency Ranking