-
公开(公告)号:US20210233462A1
公开(公告)日:2021-07-29
申请号:US17139544
申请日:2020-12-31
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Shang DING , Huibo ZHONG , Yang WANG , Haibin SHAO
IPC: G09G3/32
Abstract: Aspects of the description provide for a circuit. In at least some examples, the circuit includes a driver. The driver includes a phase-locked loop and a digital interface. The phase-locked loop is configured to receive a clock signal and provide a second clock signal based on the first clock signal. The digital interface is configured to, receive the first clock signal, receive and sample data from a data frame at sequential rising edge transitions and falling edge transitions of the first clock signal, extract a portion of the data frame addressed to the driver from the data frame, and provide a portion of the data frame remaining after extracting the portion of the data frame addressed to the driver.
-
公开(公告)号:US20220076615A1
公开(公告)日:2022-03-10
申请号:US17183674
申请日:2021-02-24
Applicant: Texas Instruments Incorporated
Inventor: Shang DING , Huibo ZHONG , Yang WANG , Haibin SHAO , Mingming HOU , Yongjie HUANG , Jing ZHANG
IPC: G09G3/32
Abstract: A light-emitting diode (LED) display driver is operable to drive LEDs of an LED display and has a display interval with sub-periods and a blank time, each sub-period having multiple segments. The LED display driver includes: a data input; LED channel outputs adapted to be coupled to LEDs to drive the LEDs; and blank time distribution circuitry coupled between the data input and the LED channel outputs. The blank time distribution circuitry operable to distribute the blank time as blank time portions added to at least some of the sub-periods. Each blank time portion is smaller than a duration of each sub-period.
-
公开(公告)号:US20220189380A1
公开(公告)日:2022-06-16
申请号:US17122792
申请日:2020-12-15
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Yang WANG , Huibo ZHONG , Haibin SHAO , Yan HE , Shang DING , Yongxiang ZHANG
IPC: G09G3/32
Abstract: A light-emitting diode (LED) display driver circuit includes: a set of scan lines, each scan line having a respective switch; a set of channels coupled to each scan line of the set of scan lines; and a scan line controller coupled to each respective switch of the set of scan lines, the scan line controller configured to provide a programmable sequence of control signals to respective switches of the set of scan lines.
-
-