公开(公告)号：US09612962B2

公开(公告)日：2017-04-04

申请号：US14539526

申请日：2014-11-12

Applicant: Texas Instruments Incorporated

Inventor： Hetul Sanghvi ,  Mullangi Venkata Ratna Reddy ,  Ajit Deepak Gupte ,  Arindam Basak

IPC: G06F13/28 ,  G06F12/08 ,  H04N19/433 ,  H04N19/51 ,  G06F12/0846

CPC classification number: G06F12/0848 ,  G06F13/28 ,  G06F2212/282 ,  H04N19/433 ,  H04N19/51

Abstract: In certain embodiments, methods and systems for multimedia data processing are provided. In an embodiment, a method for processing multimedia data includes defining one or more pixel block regions in a first cache so as to cache a plurality of reference pixel blocks corresponding to reference data. A reference pixel block from among the plurality of reference pixel blocks is assigned to a pixel block region from among the one or more pixel block regions based on a predetermined criterion. The reference pixel block is associated with a tag based on the pixel block region so as to facilitate a search of the reference data in order to process a plurality of pixel blocks associated with a multimedia frame of the multimedia data.

公开(公告)号：US10652582B2

公开(公告)日：2020-05-12

申请号：US15871713

申请日：2018-01-15

Applicant: Texas Instruments Incorporated

Inventor： Niraj Nandan ,  Mullangi Venkata Ratna Reddy

IPC: H04N19/80 ,  H04N19/423 ,  H04N19/86

Abstract: A de-blocking filter includes a reconstructed memory that is configured to store reconstructed pixels corresponding to a current macroblock of a video image to be filtered. The current macroblock includes a set of sub-blocks, each sub-block having horizontal edges and vertical edges. An internal pixel buffer in the de-blocking filter is configured to store pixels corresponding to the set of sub-blocks from the reconstructed memory, and to store partially filtered pixels corresponding to a set of partially filtered macroblocks. An edge order controller in the de-blocking filter is configured to load the pixels corresponding to the set of sub-blocks into a filter engine from the internal pixel buffer, to filter the set of sub-blocks, such that, at least one horizontal edge is filtered before filtering all vertical edges of the set of sub-blocks.

公开(公告)号：US20180184125A1

公开(公告)日：2018-06-28

申请号：US15871713

申请日：2018-01-15

Applicant: Texas Instruments Incorporated

Inventor： Niraj Nandan ,  Mullangi Venkata Ratna Reddy

IPC: H04N19/80 ,  H04N19/423 ,  H04N19/86

CPC classification number: H04N19/80 ,  H04N19/423 ,  H04N19/86

Abstract: A de-blocking filter includes a reconstructed memory that is configured to store reconstructed pixels corresponding to a current macroblock of a video image to be filtered. The current macroblock includes a set of sub-blocks, each sub-block having horizontal edges and vertical edges. An internal pixel buffer in the de-blocking filter is configured to store pixels corresponding to the set of sub-blocks from the reconstructed memory, and to store partially filtered pixels corresponding to a set of partially filtered macroblocks. An edge order controller in the de-blocking filter is configured to load the pixels corresponding to the set of sub-blocks into a filter engine from the internal pixel buffer, to filter the set of sub-blocks, such that, at least one horizontal edge is filtered before filtering all vertical edges of the set of sub-blocks.

公开(公告)号：US11700396B2

公开(公告)日：2023-07-11

申请号：US17523541

申请日：2021-11-10

Applicant: Texas Instruments Incorporated

Inventor： Niraj Nandan ,  Mullangi Venkata Ratna Reddy

IPC: H04N19/80 ,  H04N19/423 ,  H04N19/86

CPC classification number: H04N19/80 ,  H04N19/423 ,  H04N19/86

Abstract: A de-blocking filter includes a reconstructed memory that is configured to store reconstructed pixels corresponding to a current macroblock of a video image to be filtered. The current macroblock includes a set of sub-blocks, each sub-block having horizontal edges and vertical edges. An internal pixel buffer in the de-blocking filter is configured to store pixels corresponding to the set of sub-blocks from the reconstructed memory, and to store partially filtered pixels corresponding to a set of partially filtered macroblocks. An edge order controller in the de-blocking filter is configured to load the pixels corresponding to the set of sub-blocks into a filter engine from the internal pixel buffer, to filter the set of sub-blocks, such that, at least one horizontal edge is filtered before filtering all vertical edges of the set of sub-blocks.

公开(公告)号：US09602841B2

公开(公告)日：2017-03-21

申请号：US13663707

申请日：2012-10-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Manu Mathew ,  Mullangi Venkata Ratna Reddy

IPC: H04N19/88 ,  H04N19/30

CPC classification number: H04N19/88 ,  H04N19/30

Abstract: A system and method for decoding video encoded using scalable video coding. In one embodiment, a decoder for scalable video coding (SVC) includes an SVC access unit analyzer and decoding logic. The SVC access unit analyzer is configured to examine an SVC access unit prior to layered decoding of the access unit, to determine, based on the examination, what operations the access unit specifies for each layer of the decoding, and to determine, based on the determined operations to be performed for each layer of the decoding, what data to store for use by a subsequent layer of the decoding. The decoding logic is configured to decode the access unit via a plurality of decoding layers; and to store at each decoding layer, for use by a subsequent decoding layer, the data determined by the SVC access unit analyzer to be used by the subsequent decoding layer.

公开(公告)号：US12262061B2

公开(公告)日：2025-03-25

申请号：US18219788

申请日：2023-07-10

Applicant: Texas Instruments Incorporated

Inventor： Niraj Nandan ,  Mullangi Venkata Ratna Reddy

IPC: H04N19/80 ,  H04N19/423 ,  H04N19/86

Abstract: A de-blocking filter includes a reconstructed memory that is configured to store reconstructed pixels corresponding to a current macroblock of a video image to be filtered. The current macroblock includes a set of sub-blocks, each sub-block having horizontal edges and vertical edges. An internal pixel buffer in the de-blocking filter is configured to store pixels corresponding to the set of sub-blocks from the reconstructed memory, and to store partially filtered pixels corresponding to a set of partially filtered macroblocks. An edge order controller in the de-blocking filter is configured to load the pixels corresponding to the set of sub-blocks into a filter engine from the internal pixel buffer, to filter the set of sub-blocks, such that, at least one horizontal edge is filtered before filtering all vertical edges of the set of sub-blocks.

公开(公告)号：US11202102B2

公开(公告)日：2021-12-14

申请号：US16838132

申请日：2020-04-02

Applicant: Texas Instruments Incorporated

Inventor： Niraj Nandan ,  Mullangi Venkata Ratna Reddy

IPC: H04N19/80 ,  H04N19/423 ,  H04N19/86

Abstract: A de-blocking filter includes a reconstructed memory that is configured to store reconstructed pixels corresponding to a current macroblock of a video image to be filtered. The current macroblock includes a set of sub-blocks, each sub-block having horizontal edges and vertical edges. An internal pixel buffer in the de-blocking filter is configured to store pixels corresponding to the set of sub-blocks from the reconstructed memory, and to store partially filtered pixels corresponding to a set of partially filtered macroblocks. An edge order controller in the de-blocking filter is configured to load the pixels corresponding to the set of sub-blocks into a filter engine from the internal pixel buffer, to filter the set of sub-blocks, such that, at least one horizontal edge is filtered before filtering all vertical edges of the set of sub-blocks.

公开(公告)号：US20150074318A1

公开(公告)日：2015-03-12

申请号：US14539526

申请日：2014-11-12

Applicant: Texas Instruments Incorporated

Inventor： Hetul Sanghvi ,  Mullangi Venkata Ratna Reddy ,  Ajit Deepak Gupta ,  Arindam Basak

IPC: G06F12/08 ,  G06F13/28

CPC classification number: G06F12/0848 ,  G06F13/28 ,  G06F2212/282 ,  H04N19/433 ,  H04N19/51

Abstract: In certain embodiments, methods and systems for multimedia data processing are provided. In an embodiment, a method for processing multimedia data includes defining one or more pixel block regions in a first cache so as to cache a plurality of reference pixel blocks corresponding to reference data. A reference pixel block from among the plurality of reference pixel blocks is assigned to a pixel block region from among the one or more pixel block regions based on a predetermined criterion. The reference pixel block is associated with a tag based on the pixel block region so as to facilitate a search of the reference data in order to process a plurality of pixel blocks associated with a multimedia frame of the multimedia data.

Abstract translation: 在某些实施例中，提供了用于多媒体数据处理的方法和系统。 在一个实施例中，一种用于处理多媒体数据的方法包括定义第一高速缓存中的一个或多个像素块区域，以便缓存对应于参考数据的多个参考像素块。 基于预定标准，从多个参考像素块中的参考像素块从一个或多个像素块区域中分配给像素块区域。 参考像素块基于像素块区域与标签相关联，以便于搜索参考数据，以便处理与多媒体数据的多媒体帧相关联的多个像素块。

公开(公告)号：US20140119436A1

公开(公告)日：2014-05-01

申请号：US13663707

申请日：2012-10-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Manu Mathew ,  Mullangi Venkata Ratna Reddy

IPC: H04N7/26

CPC classification number: H04N19/88 ,  H04N19/30

Abstract: A system and method for decoding video encoded using scalable video coding. In one embodiment, a decoder for scalable video coding (SVC) includes an SVC access unit analyzer and decoding logic. The SVC access unit analyzer is configured to examine an SVC access unit prior to layered decoding of the access unit, to determine, based on the examination, what operations the access unit specifies for each layer of the decoding, and to determine, based on the determined operations to be performed for each layer of the decoding, what data to store for use by a subsequent layer of the decoding. The decoding logic is configured to decode the access unit via a plurality of decoding layers; and to store at each decoding layer, for use by a subsequent decoding layer, the data determined by the SVC access unit analyzer to be used by the subsequent decoding layer.

Abstract translation: 一种用于对使用可分级视频编码编码的视频进行解码的系统和方法。 在一个实施例中，用于可分级视频编码（SVC）的解码器包括SVC存取单元分析器和解码逻辑。 SVC访问单元分析器被配置为在访问单元的分层解码之前检查SVC访问单元，以基于检查来确定访问单元为每个解码层指定什么操作，并且基于 要为每个解码层执行确定的操作，存储哪些数据以供后续解码层使用。 解码逻辑被配置为经由多个解码层对存取单元进行解码; 并且在每个解码层存储由后续解码层使用的由SVC存取单元分析器确定的数据由后续解码层使用。

公开(公告)号：US20230353789A1

公开(公告)日：2023-11-02

申请号：US18219788

申请日：2023-07-10

Applicant: Texas Instruments Incorporated

Inventor： Niraj Nandan ,  Mullangi Venkata Ratna Reddy

IPC: H04N19/80 ,  H04N19/86 ,  H04N19/423

CPC classification number: H04N19/80 ,  H04N19/423 ,  H04N19/86

Abstract: A de-blocking filter includes a reconstructed memory that is configured to store reconstructed pixels corresponding to a current macroblock of a video image to be filtered. The current macroblock includes a set of sub-blocks, each sub-block having horizontal edges and vertical edges. An internal pixel buffer in the de-blocking filter is configured to store pixels corresponding to the set of sub-blocks from the reconstructed memory, and to store partially filtered pixels corresponding to a set of partially filtered macroblocks. An edge order controller in the de-blocking filter is configured to load the pixels corresponding to the set of sub-blocks into a filter engine from the internal pixel buffer, to filter the set of sub-blocks, such that, at least one horizontal edge is filtered before filtering all vertical edges of the set of sub-blocks.