公开(公告)号：US09652686B2

公开(公告)日：2017-05-16

申请号：US15345523

申请日：2016-11-08

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Jayasree Sankaranarayanan ,  Dipan Kumar Mandal ,  Prashanth R Viswanath

IPC: G06K9/46 ,  G06K9/48 ,  G06K9/62 ,  G06K9/00

CPC classification number: G06K9/4638 ,  G06K9/00986 ,  G06K9/4604 ,  G06K9/481 ,  G06K9/6211

Abstract: This invention enables effective corner detection of pixels of an image using the FAST algorithm using a vector SIMD processor. This invention loads an 8×8 pixel block that includes four 7×7 pixel blocks including the 16 peripheral pixels to be tested for each of four center pixels. This invention rearranges the 64 pixels of the 8×8 block to form a 16 element array for each center pixel preferably using a vector permutation instruction. This invention uses vector SIMD subtraction and compare and vector SIMD addition and compare to make the FAST algorithm comparisons. The N consecutive pixels determinations of the FAST algorithm are made from the results of plural shift and AND operations. The corresponding center pixel is marked a corner or not a corner dependent upon of the results of plural shift and AND operations.