公开(公告)号：US20200019374A1

公开(公告)日：2020-01-16

申请号：US16237447

申请日：2018-12-31

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Indu PRATHAPAN ,  Puneet SABBARWAL ,  Pankaj GUPTA

IPC: G06F7/24 ,  G06F5/06

Abstract: An accelerator for bitonic sorting includes a plurality of compare-exchange circuits and a first-in, first-out (FIFO) buffer associated with each of the compare-exchange circuits. An output of each FIFO buffer is a FIFO value. The compare-exchange circuits are configured to, in a first mode, store a previous value from a previous compare-exchange circuit or a memory to its associated FIFO buffer and pass a FIFO value from its associated FIFO buffer to a subsequent compare-exchange circuit or the memory; in a second mode, compare the previous value to the FIFO value, store the greater value to its associated FIFO buffer, and pass the lesser value to the subsequent compare-exchange circuit or the memory; and in a third mode, compare the previous value to the FIFO value, store the lesser value to its associated FIFO buffer, and pass the greater value to the subsequent compare-exchange circuit or the memory.