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公开(公告)号:US20230138281A1
公开(公告)日:2023-05-04
申请号:US17515391
申请日:2021-10-29
Applicant: Texas Instruments Incorporated
Inventor: Raul Blecic , Nicola Bertoni
Abstract: A laminate transformer includes a multilayer substrate having at least first, second, third, and fourth metal layers. The second metal layer and the third metal layer are separated by a voltage barrier having a thickness. A first multiloop coil has at least a first loop on the first metal layer and at least a second loop on the second metal layer. A second multiloop coil has at least a third loop on the third metal layer and at least a fourth loop on the fourth metal layer. A partial EMI shield for the first multiloop coil is on the second metal layer. A partial EMI shield for the second multiloop coil is on the third metal layer.
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公开(公告)号:US20240371800A1
公开(公告)日:2024-11-07
申请号:US18773348
申请日:2024-07-15
Applicant: Texas Instruments Incorporated
Inventor: Raul Blecic , Nicola Bertoni , Zhemin Zhang
IPC: H01L23/64 , H01F19/00 , H01F27/36 , H01L21/48 , H01L23/498 , H01L23/552
Abstract: An electronic device includes a multilevel lamination structure having a core layer, dielectric layers and conductive features formed in metal layers on or between respective ones or pairs of the dielectric layers. The core layer and the dielectric layers extend in respective planes of orthogonal first and second directions and are stacked along an orthogonal third direction. The conductive features include a first patterned conductive feature having multiple conductive turns in each of a first pair of the metal layers to form a first winding having a first turn and a final turn adjacent to one another in the same metal layer of the first pair, and a second patterned conductive feature having multiple conductive turns in a second pair of the metal layers to form a second winding having a first turn and a final turn.
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公开(公告)号:US20220415829A1
公开(公告)日:2022-12-29
申请号:US17474103
申请日:2021-09-14
Applicant: Texas Instruments Incorporated
Inventor: Raul Blecic , Nicola Bertoni , Zhemin Zhang
IPC: H01L23/64 , H01L23/498 , H01L23/552 , H01L21/48 , H01L49/02 , H01F27/36
Abstract: An electronic device includes a multilevel lamination structure having a core layer, dielectric layers and conductive features formed in metal layers on or between respective ones or pairs of the dielectric layers. The core layer and the dielectric layers extend in respective planes of orthogonal first and second directions and are stacked along an orthogonal third direction. The conductive features include a first patterned conductive feature having multiple conductive turns in each of a first pair of the metal layers to form a first winding having a first turn and a final turn adjacent to one another in the same metal layer of the first pair, and a second patterned conductive feature having multiple conductive turns in a second pair of the metal layers to form a second winding having a first turn and a final turn.
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公开(公告)号:US12218574B2
公开(公告)日:2025-02-04
申请号:US17877067
申请日:2022-07-29
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Raul Blecic , Giacomo Calabrese , Sooping Saw , Premsagar Kittur
Abstract: A modulation device may include a variable burst regulator and a current-driven clock generator. The modulation device may include a first output terminal configured to provide a modulated voltage for an operating frequency over a modulation period. The current-driven clock generator may include a second input terminal configured to receive a buffered version of the modulated voltage. The current-driven clock generator may include a second output terminal configured to provide a modulated current during the modulation period. The operating frequency may be proportional to the modulated current. The operating frequency may control the operating frequency over the modulation period.
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