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Patent Agency Ranking
公开(公告)号：US11531361B2
公开(公告)日：2022-12-20
申请号：US17139500
申请日：2020-12-31
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Kishan Joshi , Sanjeev Manandhar
IPC: G05F1/56
Abstract: In an example, an apparatus includes an error amplifier, a buffer, a transistor, and a current-mode feedforward ripple canceller (CFFRC). The error amplifier has an amplifier output, a first input, and a second input, the error amplifier second input configured to receive a reference voltage. The buffer has a buffer input and a buffer output, the buffer input coupled to the error amplifier output. The transistor has a gate, a source, and a drain, the gate coupled to the buffer output, the drain coupled to the first input. The transistor is configured to receive an input voltage (VIN) at the source and provide an output voltage at the drain. The CFFRC has a CFFRC input and a CFFRC output, the CFFRC output coupled to the gate, and the CFFRC input configured to receive VIN.
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公开(公告)号：US11782468B2
公开(公告)日：2023-10-10
申请号：US17981557
申请日：2022-11-07
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Kishan Joshi , Sanjeev Manandhar
IPC: G05F1/56
CPC classification number: G05F1/56
Abstract: In an example, an apparatus includes an error amplifier, a buffer, a transistor, and a current-mode feedforward ripple canceller (CFFRC). The error amplifier has an amplifier output, a first input, and a second input, the error amplifier second input configured to receive a reference voltage. The buffer has a buffer input and a buffer output, the buffer input coupled to the error amplifier output. The transistor has a gate, a source, and a drain, the gate coupled to the buffer output, the drain coupled to the first input. The transistor is configured to receive an input voltage (VIN) at the source and provide an output voltage at the drain. The CFFRC has a CFFRC input and a CFFRC output, the CFFRC output coupled to the gate, and the CFFRC input configured to receive VIN.
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3.发明申请COMBINED INPUT STAGE FOR TRANSCONDUCTANCE AMPLIFIER HAVING GAIN LINEARITY OVER INCREASED INPUT VOLTAGE RANGE 有权用于具有增加输入电压范围内增益线性的交叉放大器的组合输入级公开(公告)号：US20150002222A1
公开(公告)日：2015-01-01
申请号：US13930764
申请日：2013-06-28
Applicant: Texas Instruments Incorporated
Inventor： Sanjeev Manandhar , Gary S. Gibson
CPC classification number: H03F3/211 , H03F1/3211 , H03F3/4508 , H03F3/45085
Abstract: First and second transconductance amplifier input stages having first and second gain characteristics, respectively, are combined. The resulting combined input stage has a third gain characteristic with a linear range that is larger than a linear range of either of the first and second gain characteristics.
Abstract translation: 分别具有第一和第二增益特性的第一和第二跨导放大器输入级被组合。 所得到的组合输入级具有第三增益特性，其具有大于第一和第二增益特性中的任一个的线性范围的线性范围。
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公开(公告)号：US10915121B2
公开(公告)日：2021-02-09
申请号：US16184414
申请日：2018-11-08
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Raveesh Magod Ramakrishna , Sanjeev Manandhar
IPC: G05F1/565
Abstract: A system includes a low dropout regulator (LDO) circuit. The LDO circuit includes an error amplifier with an input node, a reference node, and an output node. The LDO circuit also includes a pass transistor with a control terminal, a first current terminal, and a second current terminal. The control terminal is coupled to the output node of the error amplifier, the first current terminal is coupled to a voltage source node, and the second current terminal is coupled to an LDO output node. The LDO output node is coupled to the input node of the error amplifier. The LDO circuit also includes a switched-capacitor network coupled between error amplifier and the pass transistor. The switched-capacitor network comprises a pair of switches and a current-controlled oscillator coupled to control terminals of the switches.
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5.发明授权Combined input stage for transconductance amplifier having gain linearity over increased input voltage range 有权跨输入放大器的组合输入级在增加的输入电压范围内具有增益线性度公开(公告)号：US09209761B2
公开(公告)日：2015-12-08
申请号：US13930764
申请日：2013-06-28
Applicant: Texas Instruments Incorporated
Inventor： Sanjeev Manandhar , Gary S. Gibson
CPC classification number: H03F3/211 , H03F1/3211 , H03F3/4508 , H03F3/45085
Abstract: First and second transconductance amplifier input stages having first and second gain characteristics, respectively, are combined. The resulting combined input stage has a third gain characteristic with a linear range that is larger than a linear range of either of the first and second gain characteristics.
Abstract translation: 分别具有第一和第二增益特性的第一和第二跨导放大器输入级被组合。 所得到的组合输入级具有第三增益特性，其具有大于第一和第二增益特性中的任一个的线性范围的线性范围。
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