公开(公告)号：US20200169159A1

公开(公告)日：2020-05-28

申请号：US16670768

申请日：2019-10-31

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Saurav BANDYOPADHYAY ,  Thomas Matthew LaBELLA ,  Robert Allan NEIDORFF

IPC: H02M1/08 ,  H03K5/24

Abstract: Aspects of the disclosure provide for a circuit. In some examples, the circuit includes a first comparator, a second comparator, and a logic circuit. The first comparator includes a first input terminal coupled to a first node, a second input terminal coupled to a second node, and an output terminal. The second comparator includes a first input terminal coupled to the first node, a second input terminal coupled to a third node, and an output terminal. The logic circuit includes a first input terminal coupled to the output terminal of the first comparator, a second input terminal coupled to the output terminal of the second comparator, and an output terminal. The logic circuit is configured to determine a change in current over time based on analyzing an output signal of the first comparator and an output signal of the second comparator over a plurality of sequential cycles of operation.