Abstract:
A field effect transistor (F.E.T.), comprising two control gates disposed in side-by-side relationship and capable of being operated at frequencies higher than 1 GHz, is provided. A gate G1 is deposited at the bottom of a trench T1, recessed in the F.E.T.''s semiconductive layer and connected to a contact stud K1. It encloses the source S of the transistor and is surrounded, at a distance of the order of 10 microns, by a gate G2 deposited at the bottom of a trench T2 recessed in the F.E.T.''s semiconductive layer and connected to a contact stud K2. The drain D of the transistor surrounds the trench T2 and the stud K2. The cross-section of the trenches is of the order of 1 micron by 1 micron.