公开(公告)号：US20110177663A1

公开(公告)日：2011-07-21

申请号：US13076833

申请日：2011-03-31

Applicant: TSUYOSHI KACHI

Inventor： TSUYOSHI KACHI

IPC: H01L21/336

CPC classification number: H01L29/7813 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42372 ,  H01L29/4238 ,  H01L29/66719 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7811

Abstract: Generally, a power MOSFET mainly includes an active region occupying most of an internal region (a region where a gate electrode made of polysilicon or the like is integrated), and a surrounding gate contact region (where the gate electrode made of polysilicon or the like is derived outside a source metal covered region to make contact with a gate metal) (see FIG. 65 in a comparative example). Since the gate electrode made of polysilicon or the like has a stepped portion existing between both regions, a focus margin maybe reduced in a lithography step, including exposure or the like, for formation of a contact hole for a source or for a gate. The invention of the present application provides a semiconductor device having a trench gate type power MISFET with a gate electrode protruding from an upper surface of a semiconductor substrate, in which respective main upper surfaces of the gate electrode in an active region and a gate contact region are substantially at the same height.

Abstract translation: 通常，功率MOSFET主要包括占据大部分内部区域（由多晶硅等形成的栅电极的区域）的有源区域和周围的栅极接触区域（其中由多晶硅等构成的栅极电极 衍生在源极金属覆盖区域外部以与栅极金属接触）（参见比较例中的图65）。 由于由多晶硅等制成的栅电极具有存在于两个区域之间的阶梯部分，所以在用于形成用于源极或栅极的接触孔的曝光等的光刻步骤中可能减小焦距。 本申请的发明提供了一种半导体器件，其具有沟槽栅型功率MISFET，栅极电极从半导体衬底的上表面突出，其中有源区中的栅电极的主要上表面和栅极接触区域 基本上处于相同的高度。