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公开(公告)号:US20200168527A1
公开(公告)日:2020-05-28
申请号:US16562540
申请日:2019-09-06
发明人: Fong-Yuan CHANG , Chin-Chou LIU , Chin-Her CHIEN , Cheny-hung YEH , Hui Yu LEE , Po-Hsiang HUANG , Yi-Kan CHENG
摘要: A device, such as a computer system, includes an interconnection device die and at least two additional device dice. The additional device dies can be system on integrated chip (SOIC) dies laying face to face (F2F) on the interconnection device die. The interconnection device die includes electrical connectors on one surface, enabling connection to and/or among the additional device dice. The interconnection device die includes at least one redistribution circuit structure, which may be an integrated fan out (InFO) structure, and at least one through-silicon via (TSV). The TSV enables connection between a signal line, power line or ground line, from an opposite surface of the interconnection device die to the redistribution circuit structure and/or electrical connectors. At least one of the additional dice can be a three-dimensional integrated circuit (3DIC) die with face to back (F2B) stacking.