公开(公告)号：US09768119B2

公开(公告)日：2017-09-19

申请号：US13859797

申请日：2013-04-10

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Yeh Yu ,  Yuan-Te Hou ,  Chung-Min Fu ,  Wen-Hao Chen ,  Wan-Yu Lo

IPC: H01L27/02 ,  H01L23/52 ,  H01L27/11 ,  H01L29/00 ,  H01L23/528 ,  H01L21/768

CPC classification number: H01L23/5286 ,  H01L21/768 ,  H01L23/5283 ,  H01L27/0207 ,  H01L27/11807 ,  H01L2027/11881 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An integrated circuit structure includes a plurality of power or ground rails for an integrated circuit, the plurality of power or ground rails vertically separated on a plane, a plurality of functional cells between the plurality of power rails or between the plurality of ground rails or both, and a jumper connection between the vertically separated power rails or ground rails, the jumper connection within a vertically aligned gap among the plurality of functional cells. A method of mitigating IR drop and electromigration affects in an integrated circuit includes forming a plurality of power rails or ground rails, each of the power rails or ground rails on separate vertical levels of a plane of an integrated circuit layout and connecting with a jumper connection at least two power rails or two ground rails, the jumper connection within a vertically aligned gap among cells of the integrated circuit.