公开(公告)号：US20190304846A1

公开(公告)日：2019-10-03

申请号：US15937472

申请日：2018-03-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Kun-Yu LEE ,  Huicheng CHANG ,  Che-Hao CHANG ,  Ching-Hwanq SU ,  Weng CHANG ,  Xiong-Fei YU

IPC: H01L21/8238 ,  H01L27/092

Abstract: Embodiments described herein relate to a method for patterning a doping layer, such as a lanthanum containing layer, used to dope a high-k dielectric layer in a gate stack of a FinFET device for threshold voltage tuning. A blocking layer may be formed between the doping layer and a hard mask layer used to pattern the doping layer. In an embodiment, the blocking layer may include or be aluminum oxide (AlOx). The blocking layer can prevent elements from the hard mask layer from diffusing into the doping layer, and thus, can improve reliability of the devices formed. The blocking layer can also improve a patterning process by reducing patterning induced defects.