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公开(公告)号:US20250069989A1
公开(公告)日:2025-02-27
申请号:US18238049
申请日:2023-08-25
Inventor: Yen-Chih HUANG , Li-An SUN , Chih-Hao CHEN , Chung-Chuan HUANG
IPC: H01L23/48 , H01L21/768
Abstract: A semiconductor device includes a FEOL structure and a BEOL structure. The BEOL structure is formed over the FEOL structure and includes a conductive layer, an etching stop layer (ESL) structure, a through via and a barrier layer. The ESL structure is formed over the conductive layer and has a first recess and a lateral surface. The through via passes through the ESL structure to form the first recess and the lateral surface. The barrier layer covers the lateral surface and the first recess. The first recess is recessed with respect to the lateral surface, and the first recess has a first depth ranging between 1 nm and 7 nm.