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公开(公告)号：US07606546B1
公开(公告)日：2009-10-20
申请号：US12106167
申请日：2008-04-18
IPC分类号： H04B1/06
CPC分类号： H04B15/02 , H04B2215/067
摘要： A system, method and system are disclosed for using a variable frequency clock generator to synchronize an average data rate over intervals of time in a variable clock domain to make it equal to a fixed data rate in a fixed clock domain while reducing electromagnetic interference, among other things. In various embodiments, setting the data rates equal to each other minimizes storage used to transition data signals between clock domains. In one embodiment, a variable frequency clock generator includes a phase modulator configured to form a variable frequency clock. Also, the variable clock generator is configured to maintain an average frequency over specific periods of time for the range of discrete frequencies. The phase-offset controller sets an average clock having substantially no offset between a fixed data rate in the fixed clock domain and an average data rate in the variable clock domain.
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公开(公告)号：US07542749B1
公开(公告)日：2009-06-02
申请号：US11955101
申请日：2007-12-12
IPC分类号： H04B1/06
CPC分类号： H04B15/02 , H04B2215/067
摘要： A system, method and system are disclosed for using a variable frequency clock generator to synchronize an average data rate over intervals of time in a variable clock domain to make it equal to a fixed data rate in a fixed clock domain while reducing electromagnetic interference, among other things. In various embodiments, setting the data rates equal to each other minimizes storage used to transition data signals between clock domains. In one embodiment, a variable frequency clock generator includes a phase modulator configured to form a variable frequency clock. Also, the variable clock generator is configured to maintain an average frequency over specific periods of time for the range of discrete frequencies. The phase-offset controller sets an average clock having substantially no offset between a fixed data rate in the fixed clock domain and an average data rate in the variable clock domain.
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3.发明授权Variable frequency clock generator for synchronizing data rates between clock domains in radio frequency wireless communication systems 有权可变频时钟发生器，用于在射频无线通信系统中的时钟域之间同步数据速率公开(公告)号：US07499690B1
公开(公告)日：2009-03-03
申请号：US11954857
申请日：2007-12-12
IPC分类号： H04B1/06
CPC分类号： H04B15/02 , H04B2215/067
摘要： A system, method and system are disclosed for using a variable frequency clock generator to synchronize an average data rate over intervals of time in a variable clock domain to make it equal to a fixed data rate in a fixed clock domain while reducing electromagnetic interference, among other things. In various embodiments, setting the data rates equal to each other minimizes storage used to transition data signals between clock domains. In one embodiment, a variable frequency clock generator includes a phase modulator configured to form a variable frequency clock. Also, the variable clock generator is configured to maintain an average frequency over specific periods of time for the range of discrete frequencies. The phase-offset controller sets an average clock having substantially no offset between a fixed data rate in the fixed clock domain and an average data rate in the variable clock domain.
摘要翻译： 公开了一种系统，方法和系统，用于使用可变频率时钟发生器在可变时钟域中的时间间隔上同步平均数据速率，使其等于固定时钟域中的固定数据速率，同时减少电磁干扰，其中 其他事情。 在各种实施例中，将数据速率设置为彼此相等最小化用于在时钟域之间转换数据信号的存储。 在一个实施例中，可变频率时钟发生器包括被配置为形成可变频率时钟的相位调制器。 此外，可变时钟发生器被配置为在离散频率的范围内保持特定时间段的平均频率。 相位偏移控制器设置在固定时钟域中的固定数据速率与可变时钟域中的平均数据速率之间基本上没有偏移的平均时钟。
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4.发明授权公开(公告)号：US07558348B1
公开(公告)日：2009-07-07
申请号：US11132757
申请日：2005-05-18
申请人： Tao Liu , Mansour Keramat , Mehrdad Heshami , Feng Bao , Timothy C. Kuo , Douglas J. Hogberg , Bo Liang , Edward Wai Yeung Liu
发明人： Tao Liu , Mansour Keramat , Mehrdad Heshami , Feng Bao , Timothy C. Kuo , Douglas J. Hogberg , Bo Liang , Edward Wai Yeung Liu
IPC分类号： H03D1/04
CPC分类号： H04B1/40 , H04B15/02 , H04B2215/067
摘要： A radio frequency antenna system and high-speed digital data link are disclosed to, among other things, reduce electromagnetic interference (“EMI”) at relatively high data rates while reducing the manufacturing complexities associated with conventional data links. In one embodiment, a radio frequency (“RF”) antenna system includes an antenna and an RF radio coupled to the antenna for receiving wireless RF signals. In particular, the RF radio is configured to digitize RF signals at a fixed data rate to form digitized data signals and to apply the digitized data signals at a variable data rate to a high-speed digital link. The variable data rate distributes the signal energy of the digitized data signals over one or more bands of frequencies, thereby beneficially altering an EMI spectral profile describing emissions that develop as the digitized data signals are transported through a channel.
摘要翻译： 公开了一种射频天线系统和高速数字数据链路，其中除了别的以外，在相对高的数据速率下降低电磁干扰（“EMI”），同时降低了与常规数据链路相关联的制造复杂性。 在一个实施例中，射频（“RF”）天线系统包括耦合到天线的天线和RF无线电，用于接收无线RF信号。 特别地，RF无线电被配置为以固定数据速率数字化RF信号以形成数字化数据信号，并以可变数据速率将数字化数据信号应用于高速数字链路。 可变数据速率通过一个或多个频率频带分配数字化数据信号的信号能量，从而有益地改变描述随着数字化数据信号通过信道传送而发展的辐射的EMI频谱分布。
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公开(公告)号：US07548740B1
公开(公告)日：2009-06-16
申请号：US11954935
申请日：2007-12-12
IPC分类号： H04B1/06
CPC分类号： H04B15/02 , H04B2215/067
摘要： A system, method and system are disclosed for using a variable frequency clock generator to synchronize an average data rate over intervals of time in a variable clock domain to make it equal to a fixed data rate in a fixed clock domain while reducing electromagnetic interference, among other things. In various embodiments, setting the data rates equal to each other minimizes storage used to transition data signals between clock domains. In one embodiment, a variable frequency clock generator includes a phase modulator configured to form a variable frequency clock. Also, the variable clock generator is configured to maintain an average frequency over specific periods of time for the range of discrete frequencies. The phase-offset controller sets an average clock having substantially no offset between a fixed data rate in the fixed clock domain and an average data rate in the variable clock domain.
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6.发明授权Variable frequency clock generator for synchronizing data rates between clock domains in radio frequency wireless communication systems 有权可变频时钟发生器，用于在射频无线通信系统中的时钟域之间同步数据速率公开(公告)号：US07389095B1
公开(公告)日：2008-06-17
申请号：US11132978
申请日：2005-05-18
IPC分类号： H04B1/06
CPC分类号： H04B15/02 , H04B2215/067
摘要： A system, method and system are disclosed for using a variable frequency clock generator to synchronize an average data rate over intervals of time in a variable clock domain to make it equal to a fixed data rate in a fixed clock domain while reducing electromagnetic interference, among other things. In various embodiments, setting the data rates equal to each other minimizes storage used to transition data signals between clock domains. In one embodiment, a variable frequency clock generator includes a phase modulator configured to form a variable frequency clock. Also, the variable clock generator is configured to maintain an average frequency over specific periods of time for the range of discrete frequencies. The phase-offset controller sets an average clock having substantially no offset between a fixed data rate in the fixed clock domain and an average data rate in the variable clock domain.
摘要翻译： 公开了一种系统，方法和系统，用于使用可变频率时钟发生器在可变时钟域中的时间间隔上同步平均数据速率，使其等于固定时钟域中的固定数据速率，同时减少电磁干扰，其中 其他事情。 在各种实施例中，将数据速率设置为彼此相等最小化用于在时钟域之间转换数据信号的存储。 在一个实施例中，可变频率时钟发生器包括被配置为形成可变频率时钟的相位调制器。 此外，可变时钟发生器被配置为在离散频率的范围内保持特定时间段的平均频率。 相位偏移控制器设置在固定时钟域中的固定数据速率与可变时钟域中的平均数据速率之间基本上没有偏移的平均时钟。
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7.发明申请公开(公告)号：US20080273637A1
公开(公告)日：2008-11-06
申请号：US12173166
申请日：2008-07-15
IPC分类号： H04L27/08
CPC分类号： H04W52/367 , H04B17/0085 , H04B17/21 , H04W52/16 , H04W52/40
摘要： An apparatus for calibrating gain of an radio frequency receiver (“Rx”) is disclosed to provide, among other things, a structure for performing in-situ gain calibration of an RF integrated circuit over time and/or over temperature without removing the RF integrated circuit from its operational configuration, especially when the gain of the RF integrated circuit is susceptible to variations in process, such as inherent with the CMOS process. In one embodiment, an exemplary apparatus includes a thermal noise generator configured to generate thermal noise as a calibrating signal into an input of an Rx path of an RF integrated circuit. The apparatus also includes a calibrator configured to first measure an output signal from an output of the Rx path, and then adjust a gain of the Rx path based on the thermal noise. In one embodiment, the thermal noise generator further includes a termination resistance and/or impedance.
摘要翻译： 公开了一种用于校准射频接收机（“Rx”）的增益的装置，其特征在于提供一种用于在不消除RF集成的情况下随时间和/或过温度进行RF集成电路的原位增益校准的结构 特别是当RF集成电路的增益易受诸如CMOS工艺固有的工艺变化影响时。 在一个实施例中，示例性装置包括热噪声发生器，其被配置为产生作为校准信号的热噪声到RF集成电路的Rx路径的输入中。 该装置还包括校准器，其被配置为首先测量来自Rx路径的输出的输出信号，然后基于热噪声来调整Rx路径的增益。 在一个实施例中，热噪声发生器还包括端接电阻和/或阻抗。
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8.发明授权公开(公告)号：US08428194B2
公开(公告)日：2013-04-23
申请号：US13399971
申请日：2012-02-17
CPC分类号： H04W52/367 , H04B17/0085 , H04B17/21 , H04W52/16 , H04W52/40
摘要： An apparatus for calibrating gain of an radio frequency receiver (“Rx”) is disclosed to provide, among other things, a structure for performing in-situ gain calibration of an RF integrated circuit over time and/or over temperature without removing the RF integrated circuit from its operational configuration, especially when the gain of the RF integrated circuit is susceptible to variations in process, such as inherent with the CMOS process. In one embodiment, an exemplary apparatus includes a thermal noise generator configured to generate thermal noise as a calibrating signal into an input of an Rx path of an RF integrated circuit. The apparatus also includes a calibrator configured to first measure an output signal from an output of the Rx path, and then adjust a gain of the Rx path based on the thermal noise. In one embodiment, the thermal noise generator further includes a termination resistance and/or impedance.
摘要翻译： 公开了一种用于校准射频接收机（“Rx”）的增益的装置，其特征在于提供一种用于在不消除RF集成的情况下随时间和/或过温度进行RF集成电路的原位增益校准的结构 特别是当RF集成电路的增益易受诸如CMOS工艺固有的工艺变化影响时。 在一个实施例中，示例性装置包括热噪声发生器，其被配置为产生作为校准信号的热噪声到RF集成电路的Rx路径的输入中。 该装置还包括校准器，其被配置为首先测量来自Rx路径的输出的输出信号，然后基于热噪声来调整Rx路径的增益。 在一个实施例中，热噪声发生器还包括端接电阻和/或阻抗。
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9.发明申请公开(公告)号：US20120149322A1
公开(公告)日：2012-06-14
申请号：US13399971
申请日：2012-02-17
IPC分类号： H04B1/06
CPC分类号： H04W52/367 , H04B17/0085 , H04B17/21 , H04W52/16 , H04W52/40
摘要： An apparatus for calibrating gain of an radio frequency receiver (“Rx”) is disclosed to provide, among other things, a structure for performing in-situ gain calibration of an RF integrated circuit over time and/or over temperature without removing the RF integrated circuit from its operational configuration, especially when the gain of the RF integrated circuit is susceptible to variations in process, such as inherent with the CMOS process. In one embodiment, an exemplary apparatus includes a thermal noise generator configured to generate thermal noise as a calibrating signal into an input of an Rx path of an RF integrated circuit. The apparatus also includes a calibrator configured to first measure an output signal from an output of the Rx path, and then adjust a gain of the Rx path based on the thermal noise. In one embodiment, the thermal noise generator further includes a termination resistance and/or impedance.
摘要翻译： 公开了一种用于校准射频接收机（“Rx”）的增益的装置，其特征在于提供一种用于在不消除RF集成的情况下随时间和/或过温度进行RF集成电路的原位增益校准的结构 特别是当RF集成电路的增益易受诸如CMOS工艺固有的工艺变化影响时。 在一个实施例中，示例性装置包括热噪声发生器，其被配置为产生作为校准信号的热噪声到RF集成电路的Rx路径的输入中。 该装置还包括校准器，其被配置为首先测量来自Rx路径的输出的输出信号，然后基于热噪声来调整Rx路径的增益。 在一个实施例中，热噪声发生器还包括端接电阻和/或阻抗。
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10.发明授权公开(公告)号：US08121221B2
公开(公告)日：2012-02-21
申请号：US12173166
申请日：2008-07-15
CPC分类号： H04W52/367 , H04B17/0085 , H04B17/21 , H04W52/16 , H04W52/40
摘要： An apparatus for calibrating gain of an radio frequency receiver (“Rx”) is disclosed to provide, among other things, a structure for performing in-situ gain calibration of an RF integrated circuit over time and/or over temperature without removing the RF integrated circuit from its operational configuration, especially when the gain of the RF integrated circuit is susceptible to variations in process, such as inherent with the CMOS process. In one embodiment, an exemplary apparatus includes a thermal noise generator configured to generate thermal noise as a calibrating signal into an input of an Rx path of an RF integrated circuit. The apparatus also includes a calibrator configured to first measure an output signal from an output of the Rx path, and then adjust a gain of the Rx path based on the thermal noise. In one embodiment, the thermal noise generator further includes a termination resistance and/or impedance.
摘要翻译： 公开了一种用于校准射频接收机（“Rx”）的增益的装置，其特征在于提供一种用于在不消除RF集成的情况下随时间和/或过温度进行RF集成电路的原位增益校准的结构 特别是当RF集成电路的增益易受诸如CMOS工艺固有的工艺变化影响时。 在一个实施例中，示例性装置包括热噪声发生器，其被配置为产生作为校准信号的热噪声到RF集成电路的Rx路径的输入中。 该装置还包括校准器，其被配置为首先测量来自Rx路径的输出的输出信号，然后基于热噪声来调整Rx路径的增益。 在一个实施例中，热噪声发生器还包括端接电阻和/或阻抗。
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