公开(公告)号：US20230122192A1

公开(公告)日：2023-04-20

申请号：US17684937

申请日：2022-03-02

Applicant: Tata Consultancy Services Limited

Inventor： Dhaval SHAH ,  Sounak DEY ,  Meripe Ajay KUMAR ,  Manoj NAMBIAR ,  Arpan PAL

IPC: G06N3/063 ,  G06N3/04

Abstract: This disclosure relates generally to a method and a system for computing using a field programmable gate array (FPGA) neuromorphic architecture. Implementing energy efficient Artificial Intelligence (AI) applications at power constrained environment/devices is challenging due to huge energy consumption during both training and inferencing. The disclosure is a FPGA architecture based neuromorphic computing platform, the basic components include a plurality of neurons and memory. The FPGA neuromorphic architecture is parameterized, parallel and modular, thus enabling improved energy/inference and Latency-Throughput. Based on values of the plurality of features of the data set, the FPGA neuromorphic architecture is generated in a modular and parallel fashion. The output of the disclosed FPGA neuromorphic architecture is the plurality of output spikes from the neuron, which becomes the basis of inference for computing.