-
公开(公告)号:US20060212663A1
公开(公告)日:2006-09-21
申请号:US11246115
申请日:2005-10-11
申请人: Tay-Jyi Lin , Pi-Chen Hsiao , Chih-Wei Liu , Chein-Wei Jen , I-Tao Liao , Po-Han Huang
发明人: Tay-Jyi Lin , Pi-Chen Hsiao , Chih-Wei Liu , Chein-Wei Jen , I-Tao Liao , Po-Han Huang
IPC分类号: G06F12/00
CPC分类号: G06F15/173
摘要: An inter-cluster communication module using the memory access network is provided, including a plurality of clusters, a memory subsystem, a controller and a switch device. When some clusters issue a load instruction and some clusters issue a store instruction of an identical memory address concurrently, the controller controls the switch device which connects the clusters and the memory banks of the memory subsystem, so that the data item is transmitted from the cluster issuing the store instruction to the cluster issuing the load instruction through the switch device, thereby achieving data exchange between the clusters. Herein, the data item is selectively stored in the memory module depending on the address. Furthermore, the data item is also transmitted between the memory and the clusters over the switch device.
摘要翻译: 提供了使用存储器访问网络的集群间通信模块,包括多个集群,存储器子系统,控制器和交换设备。 当一些集群发出加载指令并且一些集群同时发出相同存储器地址的存储指令时,控制器控制连接存储器子系统的集群和存储器组的交换设备,从而从集群发送数据项 通过交换设备向发布加载指令的集群发出存储指令,由此实现集群之间的数据交换。 这里,数据项根据地址被选择性地存储在存储器模块中。 此外,数据项也通过交换设备在存储器和簇之间传输。
-
公开(公告)号:US07404048B2
公开(公告)日:2008-07-22
申请号:US11246115
申请日:2005-10-11
申请人: Tay-Jyi Lin , Pi-Chen Hsiao , Chih-Wei Liu , Chein-Wei Jen , I-Tao Liao , Po-Han Huang
发明人: Tay-Jyi Lin , Pi-Chen Hsiao , Chih-Wei Liu , Chein-Wei Jen , I-Tao Liao , Po-Han Huang
IPC分类号: G06F12/00
CPC分类号: G06F15/173
摘要: An inter-cluster communication module using the memory access network is provided, including a plurality of clusters, a memory subsystem, a controller and a switch device. When some clusters issue a load instruction and some clusters issue a store instruction of an identical memory address concurrently, the controller controls the switch device which connects the clusters and the memory banks of the memory subsystem, so that the data item is transmitted from the cluster issuing the store instruction to the cluster issuing the load instruction through the switch device, thereby achieving data exchange between the clusters. Herein, the data item is selectively stored in the memory module depending on the address. Furthermore, the data item is also transmitted between the memory and the clusters over the switch device.
摘要翻译: 提供了使用存储器访问网络的集群间通信模块,包括多个集群,存储器子系统,控制器和交换设备。 当一些集群发出加载指令并且一些集群同时发出相同存储器地址的存储指令时,控制器控制连接存储器子系统的集群和存储器组的交换设备,从而从集群发送数据项 通过交换设备向发布加载指令的集群发出存储指令,从而实现集群之间的数据交换。 这里,数据项根据地址被选择性地存储在存储器模块中。 此外,数据项也通过交换设备在存储器和簇之间传输。
-
公开(公告)号:US20080162870A1
公开(公告)日:2008-07-03
申请号:US11780480
申请日:2007-07-20
申请人: Tay-Jyi Lin , Chein-Wei Jen , Pi-Chen Hsiao , Li-Chun Lin , Chih-Wei Liu
发明人: Tay-Jyi Lin , Chein-Wei Jen , Pi-Chen Hsiao , Li-Chun Lin , Chih-Wei Liu
IPC分类号: G06F15/00
CPC分类号: G06F9/3824 , G06F9/3828 , G06F9/3851 , G06F9/3885 , G06F9/3891
摘要: Disclosed is a virtual cluster architecture and method. The virtual cluster architecture includes N virtual clusters, N register files, M sets of function units, a virtual cluster control switch, and an inter-cluster communication mechanism. This invention uses a way of time sharing or time multiplexing to alternatively execute a single program thread across multiple parallel clusters. It minimizes the hardware resources for complicated forwarding circuitry or bypassing mechanism by greatly increasing the tolerance of instruction latency in the datapath. This invention may distribute function units serially into pipeline stages to support composite instructions. The performance and the code sizes of application programs can therefore be significantly improved with these composite instructions, of which the introduced latency can be completely hidden in this invention. This invention also has the advantage of being compatible with the program codes developed on conventional multi-cluster architectures.
摘要翻译: 公开了一种虚拟集群架构和方法。 虚拟集群架构包括N个虚拟集群,N个寄存器文件,M个功能单元组,一个虚拟集群控制交换机和一个集群间通信机制。 本发明使用时间共享或时间复用的方式来交替地在多个并行簇上执行单个程序线程。 它通过大大增加数据路径中指令延迟的容限,最大限度地减少了复杂转发电路或旁路机制的硬件资源。 本发明可以将功能单元串行地分配到流水线阶段以支持复合指令。 因此,通过这些复合指令可以显着改善应用程序的性能和代码大小,其中引入的延迟可以完全隐藏在本发明中。 本发明还具有与常规多集群架构上开发的程序代码兼容的优点。
-
-