公开(公告)号：US20240291632A1

公开(公告)日：2024-08-29

申请号：US18174395

申请日：2023-02-24

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Jaiganesh BALAKRISHNAN ,  Kandalla KRISHNA ,  Aravind VIJAYAKUMAR ,  Goutham RAMESH

IPC: H04L7/04 ,  H04L1/00 ,  H04L7/00

CPC classification number: H04L7/04 ,  H04L1/0057 ,  H04L7/0079

Abstract: A receiver includes: a PHY layer, and a processor coupled to the PHY layer. The processor is configured to: receive a set of data bits from the PHY layer; compare the set of data bits to a sync header pattern; determine a mismatch metric responsive to the comparison and to an adjustable scaling factor, and execute link synchronization operations based on the mismatch metric.

公开(公告)号：US20220182098A1

公开(公告)日：2022-06-09

申请号：US17544795

申请日：2021-12-07

Applicant: Texas Instruments Incorporated

Inventor： Sundarrajan RANGACHARI ,  Nagalinga Swamy Basayya AREMALLAPUR ,  Kalyan GUDIPATI ,  Divyeshkumar Mahendrabhai PATEL ,  Venkateshwara Reddy POTHAPU ,  Aravind VIJAYAKUMAR ,  Sarma Sundareswara GUNTURI ,  Jaiganesh BALAKRISHNAN

IPC: H04B1/40 ,  H04B1/04

Abstract: A technique for reinitializing a coupled circuit, the technique including receiving a common configuration value associated with states of a coupled circuit, tracking states associated with the coupled circuit while the coupled circuit is in a low power state based on the common configuration value, receiving the tracked state associated with the coupled circuit, receiving a scaling value associated with the coupled circuit, determining a current state of the coupled circuit based on the tracked state and the scaling value, and transmitting an indication of the current state to the coupled circuit when the coupled circuit has exited the low power state.