公开(公告)号：US20250116702A1

公开(公告)日：2025-04-10

申请号：US18588762

申请日：2024-02-27

Applicant: Texas Instruments Incorporated

Inventor： David P MAGEE ,  Bassem IBRAHIM ,  Vishnu RAVINUTHULA

IPC: G01R31/317

Abstract: A device includes a communication interface, a command processing circuit, a clock synchronization circuit, and a controllable clock source. The command processing circuit has a command input, a reference frequency output, and a reference phase output. The command input is coupled to the communication interface. The clock synchronization circuit has a reference frequency input, a reference phase input, and a frequency control output. The reference frequency output is coupled to the reference frequency input, and the reference phase input coupled to the reference phase output. The clock synchronization circuit includes a frequency synchronization circuit and a phase synchronization circuit. The controllable clock source has a frequency control input and a clock output. The frequency control input is coupled to the frequency control output.

公开(公告)号：US20240329145A1

公开(公告)日：2024-10-03

申请号：US18193156

申请日：2023-03-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Bassem IBRAHIM ,  David P MAGEE

IPC: G01R31/389 ,  G01R31/367 ,  H01M10/42

CPC classification number: G01R31/389 ,  G01R31/367 ,  H01M10/4285

Abstract: An apparatus includes a measurement circuit, a high-pass filter circuit, and a processing circuit. The measurement circuit is configured to receive an electrical signal of a device under test (DUT) and generate a measurement signal representing the electrical signal. The high-pass filter circuit is configured to perform a high-pass filtering operation on the electrical signal or the measurement signal to generate a filtered measurement signal. The processing circuit is configured to generate a measurement spectrum of the DUT based on the filtered measurement signal.

公开(公告)号：US20250102587A1

公开(公告)日：2025-03-27

申请号：US18617944

申请日：2024-03-27

Applicant: Texas Instruments Incorporated

Inventor： Bassem IBRAHIM ,  Branko MAJMUNOVIC ,  David P MAGEE

IPC: G01R31/389 ,  G01R31/367 ,  G01R31/3842

Abstract: An apparatus includes a charge transfer circuit, a control circuit, and a processing circuit. The charge transfer circuit has a first terminal, a second terminal, a third terminal, and a control input. The control circuit has a control output coupled to the control input. The processing circuit has a first input, a second input, and an output. The processing circuit is configured to receive a first signal at the first input and receive a second signal at the second input. The first signal represents a current through the charge transfer circuit. The second signal represents at least one of a first voltage between the first and second terminals or a second voltage between the second and third terminals. The processing circuit is also configured to provide a third signal based on the first and second signals at the output.