公开(公告)号：US20250112540A1

公开(公告)日：2025-04-03

申请号：US18375214

申请日：2023-09-29

Applicant: Texas Instruments Incorporated

Inventor： Ariel Dario Moctezuma ,  Sethu Mathavan Meikandamuthu Ayanar ,  Nimidev Kovilparambil Prasannan

IPC: H02M1/00 ,  G01R31/40 ,  H02M1/08 ,  H02M3/156

Abstract: An example apparatus includes: error detection circuitry having an input and an output, the error detection circuitry configured to integrate a difference between a voltage of the input of the error detection circuitry and a reference voltage to produce an integrated error voltage; peak controller circuitry coupled to the error detection circuitry, the peak controller circuitry to compare a control current to a first reference current to generate a peak control current, the control current based on an integrated error voltage, the peak control current to increase an output current of converter circuitry; and valley controller circuitry coupled to the error detection circuitry and the peak controller circuitry, the valley controller circuitry to compare the control current to a second reference current to generate a valley control current, the valley control current to decrease the output current of the converter circuitry.

公开(公告)号：US20230353096A1

公开(公告)日：2023-11-02

申请号：US17732383

申请日：2022-04-28

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Mahadevan Shankara Venkiteswaran ,  Arun Singh ,  Nimidev Kovilparambil Prasannan

IPC: H03F1/02 ,  H03F3/45 ,  H03F3/21

CPC classification number: H03F1/0227 ,  H03F3/45071 ,  H03F3/211

Abstract: An example apparatus includes a first amplifier stage having a first stage input, a first input pair having a first input and a first output coupled to the first stage input, a second input pair having a second input and a second output, current steering circuitry having a third input, a fourth input, a third output, and a fourth output, the third output coupled to the first input and the fourth output coupled to the second input, source follower circuitry having a fifth input and a fifth output, the fifth output coupled to the first input, and a comparator having a sixth output coupled to the fifth input.