公开(公告)号：US20230188140A1

公开(公告)日：2023-06-15

申请号：US17949446

申请日：2022-09-21

Applicant: Texas Instruments Incorporated

Inventor： Robin Hoel ,  Anuvrat Srivastava ,  Aniruddha P N ,  Anand Kumar G

IPC: H03K21/10 ,  G06F1/08

CPC classification number: H03K21/10 ,  G06F1/08 ,  G06F1/10

Abstract: An example apparatus includes clock divider circuitry configured to divide a system clock by a pre-scaler input to generate a divided clock; counter circuitry configured to increment a system count based on the divided clock; comparison circuitry configured to determine a count difference between the system count and a real-time clock count; and controller circuitry configured to modify the pre-scaler input based on a comparison of the count difference to a threshold value.

公开(公告)号：US20240372553A1

公开(公告)日：2024-11-07

申请号：US18773777

申请日：2024-07-16

Applicant: Texas Instruments Incorporated

Inventor： Robin Hoel ,  Anuvrat Srivastava ,  Aniruddha P N ,  Anand Kumar G

IPC: H03K21/10 ,  G06F1/08 ,  G06F1/10

Abstract: An example apparatus includes clock divider circuitry configured to divide a system clock by a pre-scaler input to generate a divided clock; counter circuitry configured to increment a system count based on the divided clock; comparison circuitry configured to determine a count difference between the system count and a real-time clock count; and controller circuitry configured to modify the pre-scaler input based on a comparison of the count difference to a threshold value.

公开(公告)号：US12074600B2

公开(公告)日：2024-08-27

申请号：US17949446

申请日：2022-09-21

Applicant: Texas Instruments Incorporated

Inventor： Robin Hoel ,  Anuvrat Srivastava ,  Aniruddha P N ,  Anand Kumar G

IPC: H03K21/10 ,  G06F1/08 ,  G06F1/10

CPC classification number: H03K21/10 ,  G06F1/08 ,  G06F1/10

Abstract: An example apparatus includes clock divider circuitry configured to divide a system clock by a pre-scaler input to generate a divided clock; counter circuitry configured to increment a system count based on the divided clock; comparison circuitry configured to determine a count difference between the system count and a real-time clock count; and controller circuitry configured to modify the pre-scaler input based on a comparison of the count difference to a threshold value.